diff options
| author | Chen Minqiang <ptpt52@gmail.com> | 2018-11-30 18:41:43 +0800 |
|---|---|---|
| committer | Mathias Kresin <dev@kresin.me> | 2018-12-03 15:34:56 +0100 |
| commit | 14b81c909f5839267ca3c450ce739582f27cecfb (patch) | |
| tree | d2a1e6252e0e5d4559270087fa68a840b1eca126 /target/linux/ramips | |
| parent | 7e88753ace0022bd56f77a7a647894f2936cf17b (diff) | |
| download | upstream-14b81c909f5839267ca3c450ce739582f27cecfb.tar.gz upstream-14b81c909f5839267ca3c450ce739582f27cecfb.tar.bz2 upstream-14b81c909f5839267ca3c450ce739582f27cecfb.zip | |
ramips: mt7620: add missing pci wifi nodes to dts files
These devices has pci wifi but not defined in dts:
HC5761
HC5861
TINY-AC
Signed-off-by: Chen Minqiang <ptpt52@gmail.com>
Diffstat (limited to 'target/linux/ramips')
| -rw-r--r-- | target/linux/ramips/dts/HC5761.dts | 8 | ||||
| -rw-r--r-- | target/linux/ramips/dts/HC5861.dts | 8 | ||||
| -rw-r--r-- | target/linux/ramips/dts/TINY-AC.dts | 8 |
3 files changed, 24 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/HC5761.dts b/target/linux/ramips/dts/HC5761.dts index 31a5aa760c..785535811d 100644 --- a/target/linux/ramips/dts/HC5761.dts +++ b/target/linux/ramips/dts/HC5761.dts @@ -37,3 +37,11 @@ }; }; }; + +&pcie0 { + mt76@0,0 { + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x8000>; + ieee80211-freq-limit = <5000000 6000000>; + }; +}; diff --git a/target/linux/ramips/dts/HC5861.dts b/target/linux/ramips/dts/HC5861.dts index 371f8db217..f157991d91 100644 --- a/target/linux/ramips/dts/HC5861.dts +++ b/target/linux/ramips/dts/HC5861.dts @@ -97,3 +97,11 @@ &gsw { mediatek,port4 = "gmac"; }; + +&pcie0 { + mt76@0,0 { + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x8000>; + ieee80211-freq-limit = <5000000 6000000>; + }; +}; diff --git a/target/linux/ramips/dts/TINY-AC.dts b/target/linux/ramips/dts/TINY-AC.dts index 93ab067ef6..d5a232124d 100644 --- a/target/linux/ramips/dts/TINY-AC.dts +++ b/target/linux/ramips/dts/TINY-AC.dts @@ -161,3 +161,11 @@ }; }; }; + +&pcie0 { + mt76@0,0 { + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x8000>; + ieee80211-freq-limit = <5000000 6000000>; + }; +}; |