diff options
| author | Hauke Mehrtens <hauke@hauke-m.de> | 2016-06-26 14:45:12 +0200 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2016-06-26 18:20:37 +0200 |
| commit | 84d489f64f3b382d5544e342f66d8806e94e85d3 (patch) | |
| tree | dca318969c99733fc177e8564ccad33beb4d2c58 /target/linux/ramips/patches-4.4/0720-arch-mips-ralink-add-i2c-clocks.patch | |
| parent | 3bf35126733a4b4073c1d3388e226c2a8f79d65b (diff) | |
| download | upstream-84d489f64f3b382d5544e342f66d8806e94e85d3.tar.gz upstream-84d489f64f3b382d5544e342f66d8806e94e85d3.tar.bz2 upstream-84d489f64f3b382d5544e342f66d8806e94e85d3.zip | |
kernel: update to version 4.4.14
Changelog: https://cdn.kernel.org/pub/linux/kernel/v4.x/ChangeLog-4.4.14
Some manual changes to target/linux/generic/patches-4.4/610-
netfilter_match_bypass_default_checks.patch were needed.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/ramips/patches-4.4/0720-arch-mips-ralink-add-i2c-clocks.patch')
| -rw-r--r-- | target/linux/ramips/patches-4.4/0720-arch-mips-ralink-add-i2c-clocks.patch | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/target/linux/ramips/patches-4.4/0720-arch-mips-ralink-add-i2c-clocks.patch b/target/linux/ramips/patches-4.4/0720-arch-mips-ralink-add-i2c-clocks.patch index ae262ac97d..500625b4e5 100644 --- a/target/linux/ramips/patches-4.4/0720-arch-mips-ralink-add-i2c-clocks.patch +++ b/target/linux/ramips/patches-4.4/0720-arch-mips-ralink-add-i2c-clocks.patch @@ -1,6 +1,6 @@ --- a/arch/mips/ralink/mt7620.c +++ b/arch/mips/ralink/mt7620.c -@@ -389,6 +389,7 @@ void __init ralink_clk_init(void) +@@ -509,6 +509,7 @@ void __init ralink_clk_init(void) unsigned long sys_rate; unsigned long dram_rate; unsigned long periph_rate; @@ -8,7 +8,7 @@ xtal_rate = mt7620_get_xtal_rate(); -@@ -403,6 +404,7 @@ void __init ralink_clk_init(void) +@@ -523,6 +524,7 @@ void __init ralink_clk_init(void) cpu_rate = MHZ(575); dram_rate = sys_rate = cpu_rate / 3; periph_rate = MHZ(40); @@ -16,7 +16,7 @@ ralink_clk_add("10000d00.uartlite", periph_rate); ralink_clk_add("10000e00.uartlite", periph_rate); -@@ -414,6 +416,7 @@ void __init ralink_clk_init(void) +@@ -534,6 +536,7 @@ void __init ralink_clk_init(void) dram_rate = mt7620_get_dram_rate(pll_rate); sys_rate = mt7620_get_sys_rate(cpu_rate); periph_rate = mt7620_get_periph_rate(xtal_rate); @@ -24,7 +24,7 @@ pr_debug(RFMT("XTAL") RFMT("CPU_PLL") RFMT("PLL"), RINT(xtal_rate), RFRAC(xtal_rate), -@@ -435,6 +438,8 @@ void __init ralink_clk_init(void) +@@ -555,6 +558,8 @@ void __init ralink_clk_init(void) ralink_clk_add("cpu", cpu_rate); ralink_clk_add("10000100.timer", periph_rate); ralink_clk_add("10000120.watchdog", periph_rate); |