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author | John Crispin <john@openwrt.org> | 2013-06-23 15:50:49 +0000 |
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committer | John Crispin <john@openwrt.org> | 2013-06-23 15:50:49 +0000 |
commit | 55fb6f3a05deb4a8b5e600cc10bae9555a9f90be (patch) | |
tree | a2ef24cfc434f5eb47364d944947588c5d51fc69 /target/linux/ramips/patches-3.9/0132-MIPS-ralink-make-mt7620-ram-detect-verbose.patch | |
parent | 43a3d87b8370872c5720b4bb6616b797486d38d8 (diff) | |
download | upstream-55fb6f3a05deb4a8b5e600cc10bae9555a9f90be.tar.gz upstream-55fb6f3a05deb4a8b5e600cc10bae9555a9f90be.tar.bz2 upstream-55fb6f3a05deb4a8b5e600cc10bae9555a9f90be.zip |
ralink: update patches
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 37016
Diffstat (limited to 'target/linux/ramips/patches-3.9/0132-MIPS-ralink-make-mt7620-ram-detect-verbose.patch')
-rw-r--r-- | target/linux/ramips/patches-3.9/0132-MIPS-ralink-make-mt7620-ram-detect-verbose.patch | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.9/0132-MIPS-ralink-make-mt7620-ram-detect-verbose.patch b/target/linux/ramips/patches-3.9/0132-MIPS-ralink-make-mt7620-ram-detect-verbose.patch new file mode 100644 index 0000000000..e98a254dd4 --- /dev/null +++ b/target/linux/ramips/patches-3.9/0132-MIPS-ralink-make-mt7620-ram-detect-verbose.patch @@ -0,0 +1,39 @@ +From eb6f94f9d53a0eecf0ff8edd5318ee2dd5403a01 Mon Sep 17 00:00:00 2001 +From: John Crispin <blogic@openwrt.org> +Date: Mon, 20 May 2013 20:30:11 +0200 +Subject: [PATCH 132/164] MIPS: ralink: make mt7620 ram detect verbose + +Make the code print which of SDRAM, DDR1 or DDR2 was detected. + +Signed-off-by: John Crispin <blogic@openwrt.org> +--- + arch/mips/ralink/mt7620.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c +index 98ddb93..28350d0 100644 +--- a/arch/mips/ralink/mt7620.c ++++ b/arch/mips/ralink/mt7620.c +@@ -214,16 +214,19 @@ void prom_soc_init(struct ralink_soc_info *soc_info) + + switch (dram_type) { + case SYSCFG0_DRAM_TYPE_SDRAM: ++ pr_info("Board has SDRAM\n"); + soc_info->mem_size_min = MT7620_SDRAM_SIZE_MIN; + soc_info->mem_size_max = MT7620_SDRAM_SIZE_MAX; + break; + + case SYSCFG0_DRAM_TYPE_DDR1: ++ pr_info("Board has DDR1\n"); + soc_info->mem_size_min = MT7620_DDR1_SIZE_MIN; + soc_info->mem_size_max = MT7620_DDR1_SIZE_MAX; + break; + + case SYSCFG0_DRAM_TYPE_DDR2: ++ pr_info("Board has DDR2\n"); + soc_info->mem_size_min = MT7620_DDR2_SIZE_MIN; + soc_info->mem_size_max = MT7620_DDR2_SIZE_MAX; + break; +-- +1.7.10.4 + |