diff options
author | John Crispin <john@openwrt.org> | 2015-02-09 12:13:55 +0000 |
---|---|---|
committer | John Crispin <john@openwrt.org> | 2015-02-09 12:13:55 +0000 |
commit | 654bc380ec549e3cdcc2c286ef7d67fea9509609 (patch) | |
tree | f25bfc6c0b5a8a9d50c13d0b9df290f25db9112a /target/linux/ramips/patches-3.18/0008-MIPS-ralink-allow-manual-memory-override.patch | |
parent | 826b461427fa2abe634e652a05dfc86fc8a6c609 (diff) | |
download | upstream-654bc380ec549e3cdcc2c286ef7d67fea9509609.tar.gz upstream-654bc380ec549e3cdcc2c286ef7d67fea9509609.tar.bz2 upstream-654bc380ec549e3cdcc2c286ef7d67fea9509609.zip |
ralink: add 3.18 support
keep default as 3.14, mt7621 gic need to be ported to 3.18
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 44349
Diffstat (limited to 'target/linux/ramips/patches-3.18/0008-MIPS-ralink-allow-manual-memory-override.patch')
-rw-r--r-- | target/linux/ramips/patches-3.18/0008-MIPS-ralink-allow-manual-memory-override.patch | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.18/0008-MIPS-ralink-allow-manual-memory-override.patch b/target/linux/ramips/patches-3.18/0008-MIPS-ralink-allow-manual-memory-override.patch new file mode 100644 index 0000000000..1870d13efc --- /dev/null +++ b/target/linux/ramips/patches-3.18/0008-MIPS-ralink-allow-manual-memory-override.patch @@ -0,0 +1,45 @@ +From 071e97587a291d3a5bbd614a425f46b7f90310aa Mon Sep 17 00:00:00 2001 +From: John Crispin <blogic@openwrt.org> +Date: Sun, 16 Mar 2014 04:40:48 +0000 +Subject: [PATCH 08/57] MIPS: ralink: allow manual memory override + +RT5350 relies on the bootloader setting up the memc correctly. +On sme boards the setup is incorrect leading to 32 MB being available but only 16 being recognized. Allow these boards to manually override the memory range +. +Signed-off-by: John Crispin <blogic@openwrt.org> +--- + arch/mips/ralink/of.c | 16 +++++++++++++++- + 1 file changed, 15 insertions(+), 1 deletion(-) + +--- a/arch/mips/ralink/of.c ++++ b/arch/mips/ralink/of.c +@@ -53,6 +53,17 @@ void __init device_tree_init(void) + unflatten_and_copy_device_tree(); + } + ++static int memory_dtb; ++ ++static int __init early_init_dt_find_memory(unsigned long node, const char *uname, ++ int depth, void *data) ++{ ++ if (depth == 1 && !strcmp(uname, "memory@0")) ++ memory_dtb = 1; ++ ++ return 0; ++} ++ + void __init plat_mem_setup(void) + { + set_io_port_base(KSEG1); +@@ -63,7 +74,10 @@ void __init plat_mem_setup(void) + */ + __dt_setup_arch(__dtb_start); + +- if (soc_info.mem_size) ++ of_scan_flat_dt(early_init_dt_find_memory, NULL); ++ if (memory_dtb) ++ of_scan_flat_dt(early_init_dt_scan_memory, NULL); ++ else if (soc_info.mem_size) + add_memory_region(soc_info.mem_base, soc_info.mem_size * SZ_1M, + BOOT_MEM_RAM); + else |