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author | Weijie Gao <hackpascal@gmail.com> | 2018-11-19 01:14:53 +0800 |
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committer | John Crispin <john@phrozen.org> | 2018-11-26 12:13:52 +0100 |
commit | c7ca224299e77f5d822dd154b99fe9aeefc550be (patch) | |
tree | db43a6a8815e505967b6d408888e2d987402356c /target/linux/ramips/dts | |
parent | f5af8be636c94c933674c6a914ae8a752100a8be (diff) | |
download | upstream-c7ca224299e77f5d822dd154b99fe9aeefc550be.tar.gz upstream-c7ca224299e77f5d822dd154b99fe9aeefc550be.tar.bz2 upstream-c7ca224299e77f5d822dd154b99fe9aeefc550be.zip |
ramips: fix cpu clock of mt7621 and add dt clk devices
For a long time the mt7621 uses a fixed cpu clock which causes a problem
if the cpu frequency is not 880MHz.
This patch fixes the cpu clock calculation and adds the cpu/bus clkdev
which will be used in dts.
Signed-off-by: Weijie Gao <hackpascal@gmail.com>
Diffstat (limited to 'target/linux/ramips/dts')
-rw-r--r-- | target/linux/ramips/dts/mt7621.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi index ee86d0c3c5..89f3f6fe2d 100644 --- a/target/linux/ramips/dts/mt7621.dtsi +++ b/target/linux/ramips/dts/mt7621.dtsi @@ -1,4 +1,5 @@ #include <dt-bindings/interrupt-controller/mips-gic.h> +#include <dt-bindings/clock/mt7621-clk.h> / { #address-cells = <1>; @@ -33,6 +34,13 @@ serial0 = &uartlite; }; + pll: pll { + compatible = "mediatek,mt7621-pll", "syscon"; + + #clock-cells = <1>; + clock-output-names = "cpu", "bus"; + }; + cpuclock: cpuclock { #clock-cells = <0>; compatible = "fixed-clock"; |