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author | Sven Roederer <devel-sven@geroedel.de> | 2017-05-29 11:24:49 +0200 |
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committer | John Crispin <john@phrozen.org> | 2017-06-07 06:33:33 +0200 |
commit | 9715beb04c74a918697945b3e2d23a139bd04b70 (patch) | |
tree | 03d755a0a8a4d10521b43970ebf265eb08451c1b /target/linux/ramips/dts | |
parent | e178d51a044c0eac1a56fa404c7da7361e336068 (diff) | |
download | upstream-9715beb04c74a918697945b3e2d23a139bd04b70.tar.gz upstream-9715beb04c74a918697945b3e2d23a139bd04b70.tar.bz2 upstream-9715beb04c74a918697945b3e2d23a139bd04b70.zip |
ramips: add support for Ubiquiti EdgeRouter X-SFP
This patch adds support for the Ubiquiti EdgeRouter X-SFP and
improves support for the EdgeRouter X (PoE-passthrough).
Specification:
- SoC: MediaTek MT7621AT
- Flash: 256 MiB
- RAM: 265 MiB
- Ethernet: 5 x LAN (1000 Mbps)
- UART: 1 x UART on PCB (3.3V, RX, TX, GND) - 57600 8N1
- EdgeRouter X:
- 1 x PoE-Passtrough (Eth4)
- powered by Wallwart or passive PoE
- EdgeRouter X-SFP:
- 5 x PoE-Out (24V, passive)
- 1 x SFP (unknown status)
- powered by Wallwart (24V)
Doesn't work:
* SoC has crypto engine but no open driver.
* SoC has nat acceleration, but no open driver.
* This router has 2MB spi flash soldered in but MT
nand/spi drivers do not support pin sharing,
so it is not accessable and disabled. Stock
firmware could read it and it was empty.
Installation
via vendor firmware:
- build an Initrd-image (> 3MiB) and upload the factory-image
- initrd can have luci-mod-failsafe
- flash final firmware via LuCI / sysupgrade on rebooted system
via TFTP:
- stop uboot into tftp-load into option "1"
- upload factory.bin image
Signed-off-by: Sven Roederer <devel-sven@geroedel.de>
Diffstat (limited to 'target/linux/ramips/dts')
-rw-r--r-- | target/linux/ramips/dts/UBNT-ER-e50.dtsi | 106 | ||||
-rw-r--r-- | target/linux/ramips/dts/UBNT-ERX-SFP.dts | 24 | ||||
-rw-r--r-- | target/linux/ramips/dts/UBNT-ERX.dts | 103 |
3 files changed, 131 insertions, 102 deletions
diff --git a/target/linux/ramips/dts/UBNT-ER-e50.dtsi b/target/linux/ramips/dts/UBNT-ER-e50.dtsi new file mode 100644 index 0000000000..b38c719494 --- /dev/null +++ b/target/linux/ramips/dts/UBNT-ER-e50.dtsi @@ -0,0 +1,106 @@ +#include "mt7621.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + compatible = "ubiquiti,edgerouterx"; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x10000000>; + }; + + chosen { + bootargs = "console=ttyS0,57600"; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <20>; + + reset { + label = "reset"; + gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + }; +}; + +ðernet { + mtd-mac-address = <&factory 0x22>; +}; + +&nand { + status = "okay"; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + label = "u-boot-env"; + reg = <0x80000 0x60000>; + read-only; + }; + + factory: partition@e0000 { + label = "factory"; + reg = <0xe0000 0x60000>; + }; + + partition@140000 { + label = "kernel1"; + reg = <0x140000 0x300000>; + }; + + partition@440000 { + label = "kernel2"; + reg = <0x440000 0x300000>; + }; + + partition@740000 { + label = "ubi"; + reg = <0x740000 0xf7c0000>; + }; +}; + +&pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "uart2", "uart3", "i2c", "pcie", "rgmii2", "jtag"; + ralink,function = "gpio"; + }; + }; +}; + +&spi0 { + /* This board has 2Mb spi flash soldered in and visible + from manufacturer's firmware. + But this SoC shares spi and nand pins, + and current driver does't handle this sharing well */ + status = "disabled"; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <1>; + spi-max-frequency = <10000000>; + m25p,chunked-io = <32>; + + partition@0 { + label = "spi"; + reg = <0x0 0x200000>; + read-only; + }; + }; +}; + +&xhci { + status = "disabled"; +}; diff --git a/target/linux/ramips/dts/UBNT-ERX-SFP.dts b/target/linux/ramips/dts/UBNT-ERX-SFP.dts new file mode 100644 index 0000000000..ca26d81721 --- /dev/null +++ b/target/linux/ramips/dts/UBNT-ERX-SFP.dts @@ -0,0 +1,24 @@ +/dts-v1/; + +#include "UBNT-ER-e50.dtsi" + +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "UBNT-ERX-SFP"; + compatible = "ubiquiti,edgerouterx-sfp"; + + i2c-gpio { + compatible = "i2c-gpio"; + gpios = <&gpio0 3 GPIO_ACTIVE_HIGH /* sda */ + &gpio0 4 GPIO_ACTIVE_HIGH /* scl */ + >; + #address-cells = <1>; + #size-cells = <0>; + + pca9555@25 { + compatible = "pca9555"; + reg = <0x25>; + }; + }; +}; diff --git a/target/linux/ramips/dts/UBNT-ERX.dts b/target/linux/ramips/dts/UBNT-ERX.dts index cf86bbb7e6..556d1156c3 100644 --- a/target/linux/ramips/dts/UBNT-ERX.dts +++ b/target/linux/ramips/dts/UBNT-ERX.dts @@ -1,108 +1,7 @@ /dts-v1/; -#include "mt7621.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> +#include "UBNT-ER-e50.dtsi" / { model = "UBNT-ERX"; - - memory@0 { - device_type = "memory"; - reg = <0x0 0x10000000>; - }; - - chosen { - bootargs = "console=ttyS0,57600"; - }; - - gpio-keys-polled { - compatible = "gpio-keys-polled"; - #address-cells = <1>; - #size-cells = <0>; - poll-interval = <20>; - - reset { - label = "reset"; - gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; - linux,code = <KEY_RESTART>; - }; - }; -}; - -ðernet { - mtd-mac-address = <&factory 0x22>; -}; - -&nand { - status = "okay"; - - partition@0 { - label = "u-boot"; - reg = <0x0 0x80000>; - read-only; - }; - - partition@80000 { - label = "u-boot-env"; - reg = <0x80000 0x60000>; - read-only; - }; - - factory: partition@e0000 { - label = "factory"; - reg = <0xe0000 0x60000>; - }; - - partition@140000 { - label = "kernel1"; - reg = <0x140000 0x300000>; - }; - - partition@440000 { - label = "kernel2"; - reg = <0x440000 0x300000>; - }; - - partition@740000 { - label = "ubi"; - reg = <0x740000 0xf7c0000>; - }; -}; - -&pinctrl { - state_default: pinctrl0 { - gpio { - ralink,group = "uart2", "uart3", "i2c", "pcie", "rgmii2", "jtag"; - ralink,function = "gpio"; - }; - }; -}; - -&spi0 { - /* This board has 2Mb spi flash soldered in and visible - from manufacturer's firmware. - But this SoC shares spi and nand pins, - and current driver does't handle this sharing well */ - status = "disabled"; - - m25p80@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "jedec,spi-nor"; - reg = <1>; - spi-max-frequency = <10000000>; - m25p,chunked-io = <32>; - - partition@0 { - label = "spi"; - reg = <0x0 0x200000>; - read-only; - }; - }; -}; - -&xhci { - status = "disabled"; }; |