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author | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2019-07-03 23:22:25 +0200 |
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committer | Daniel Golle <daniel@makrotopia.org> | 2019-07-10 17:36:29 +0200 |
commit | 48047b3a5c6aa9fff89a7a9c7ec76d8335b1a8e7 (patch) | |
tree | 6f48a2118b5ab45dcb88ab7dab0b18a6feccb619 /target/linux/ramips/dts/EW-747x.dtsi | |
parent | 402138d12dca1a24d2837145c8d31c9d35769b9d (diff) | |
download | upstream-48047b3a5c6aa9fff89a7a9c7ec76d8335b1a8e7.tar.gz upstream-48047b3a5c6aa9fff89a7a9c7ec76d8335b1a8e7.tar.bz2 upstream-48047b3a5c6aa9fff89a7a9c7ec76d8335b1a8e7.zip |
ramips/mt7620: Name DTS files based on scheme
As introduced with ath79, DTS files for ramips will now be labelled
soc_vendor_device.dts(i). With this change, DTS files can be
selected automatically without further manual links.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Diffstat (limited to 'target/linux/ramips/dts/EW-747x.dtsi')
-rw-r--r-- | target/linux/ramips/dts/EW-747x.dtsi | 192 |
1 files changed, 0 insertions, 192 deletions
diff --git a/target/linux/ramips/dts/EW-747x.dtsi b/target/linux/ramips/dts/EW-747x.dtsi deleted file mode 100644 index b7d8087d5a..0000000000 --- a/target/linux/ramips/dts/EW-747x.dtsi +++ /dev/null @@ -1,192 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - -/dts-v1/; - -#include "mt7620a.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> - -/ { - compatible = "ralink,mt7620a-soc"; - - aliases { - led-boot = &led_power; - led-failsafe = &led_power; - led-running = &led_power; - led-upgrade = &led_power; - }; - - chosen { - bootargs = "console=ttyS0,57600"; - }; - - keys { - compatible = "gpio-keys"; - - reset_wps { - label = "reset_wps"; - gpios = <&gpio2 20 GPIO_ACTIVE_LOW>; - linux,code = <KEY_RESTART>; - }; - - switch_high { - label = "switch high"; - gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; - linux,code = <BTN_0>; - linux,input-type = <EV_SW>; - }; - - switch_off { - label = "switch off"; - gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; - linux,code = <BTN_1>; - linux,input-type = <EV_SW>; - }; - }; -}; - -&gpio1 { - status = "okay"; -}; - -&gpio2 { - status = "okay"; -}; - -&spi0 { - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <10000000>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "u-boot"; - reg = <0x0 0x30000>; - read-only; - }; - - partition@30000 { - label = "u-boot-env"; - reg = <0x30000 0x10000>; - read-only; - }; - - factory: partition@40000 { - label = "factory"; - reg = <0x40000 0x10000>; - read-only; - }; - - partition@50000 { - label = "cimage"; - reg = <0x50000 0x20000>; - read-only; - }; - - partition@70000 { - compatible = "edimax,uimage"; - label = "firmware"; - reg = <0x00070000 0x00790000>; - }; - }; - }; -}; - -&pinctrl { - state_default: pinctrl0 { - gpio { - ralink,group = "i2c", "uartf", "nd_sd", "rgmii2"; - ralink,function = "gpio"; - }; - }; - - phy_reset_pins: phy-reset { - gpio { - ralink,group = "spi refclk"; - ralink,function = "gpio"; - }; - }; -}; - -ðernet { - - status = "okay"; - mtd-mac-address = <&factory 0x4>; - - pinctrl-names = "default"; - pinctrl-0 = <&rgmii1_pins &mdio_pins &phy_reset_pins>; - - mediatek,portmap = "l"; - mediatek,mdio-mode = <1>; - - phy-reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; - phy-reset-duration = <30>; - - port@5 { - status = "okay"; - mediatek,fixed-link = <1000 1 1 1>; - phy-mode = "rgmii"; - }; - - mdio-bus { - status = "okay"; - - phy0: ethernet-phy@0 { - status = "disabled"; - reg = <0>; - phy-mode = "rgmii"; - }; - - phy1: ethernet-phy@1 { - status = "disabled"; - reg = <1>; - phy-mode = "rgmii"; - }; - - phy2: ethernet-phy@2 { - status = "disabled"; - reg = <2>; - phy-mode = "rgmii"; - }; - - phy3: ethernet-phy@3 { - status = "disabled"; - reg = <3>; - phy-mode = "rgmii"; - }; - - phy4: ethernet-phy@4 { - status = "disabled"; - reg = <4>; - phy-mode = "rgmii"; - }; - }; -}; - -&gsw { - mediatek,port5 = "gmac"; -}; - -&wmac { - ralink,mtd-eeprom = <&factory 0>; -}; - -&pcie { - status = "okay"; -}; - -&pcie0 { - wifi@0,0 { - reg = <0x0000 0 0 0 0>; - mediatek,mtd-eeprom = <&factory 0x8000>; - mediatek,2ghz = <0>; - }; -}; |