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author | Paul Spooren <mail@aparcar.org> | 2021-11-02 14:41:23 -1000 |
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committer | Hauke Mehrtens <hauke@hauke-m.de> | 2021-11-07 18:32:21 +0100 |
commit | 184d072fc0d4fd2721e66abf00c985f4477c6a09 (patch) | |
tree | 18b7b5c70ed6e0f7f2ab438fbd7ac257e913416e /target/linux/pistachio/patches-5.4/109-MIPS-DTS-img-marduk-switch-mmc-to-1-bit-mode.patch | |
parent | 646c011ec76eca151b24ccde01df12f47e199d2d (diff) | |
download | upstream-184d072fc0d4fd2721e66abf00c985f4477c6a09.tar.gz upstream-184d072fc0d4fd2721e66abf00c985f4477c6a09.tar.bz2 upstream-184d072fc0d4fd2721e66abf00c985f4477c6a09.zip |
pistachio: drop Kernel 5.4 support
With the switch to Kernel 5.10 the 5.4 files are no longer needed.
Signed-off-by: Paul Spooren <mail@aparcar.org>
Diffstat (limited to 'target/linux/pistachio/patches-5.4/109-MIPS-DTS-img-marduk-switch-mmc-to-1-bit-mode.patch')
-rw-r--r-- | target/linux/pistachio/patches-5.4/109-MIPS-DTS-img-marduk-switch-mmc-to-1-bit-mode.patch | 47 |
1 files changed, 0 insertions, 47 deletions
diff --git a/target/linux/pistachio/patches-5.4/109-MIPS-DTS-img-marduk-switch-mmc-to-1-bit-mode.patch b/target/linux/pistachio/patches-5.4/109-MIPS-DTS-img-marduk-switch-mmc-to-1-bit-mode.patch deleted file mode 100644 index cec424a0ce..0000000000 --- a/target/linux/pistachio/patches-5.4/109-MIPS-DTS-img-marduk-switch-mmc-to-1-bit-mode.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 981c1d416af45eff207227aec106381ac23aac99 Mon Sep 17 00:00:00 2001 -From: Ian Pozella <Ian.Pozella@imgtec.com> -Date: Mon, 20 Feb 2017 10:00:52 +0000 -Subject: MIPS: DTS: img: marduk: switch mmc to 1 bit mode - -The mmc block in Pistachio allows 1 to 8 data bits to be used. -Marduk uses 4 bits allowing the upper 4 bits to be allocated -to the Mikrobus ports. However these bits are still connected -internally meaning the mmc block recieves signals on all data lines -and seems the internal HW CRC checks get corrupted by this erroneous -data. - -We cannot control what data is sent on these lines because they go -to external ports. 1 bit mode does not exhibit the issue hence the -safe default is to use this. If a user knows that in their use case -they will not use the upper bits then they can set to 4 bit mode in -order to improve performance. - -Also make sure that the upper 4 bits don't get allocated to the mmc -driver (the default is to assign all 8 pins) so they can be allocated -to other drivers. Allocating all 4 despite setting 1 bit mode as this -matches what is there in hardware. - -Signed-off-by: Ian Pozella <Ian.Pozella@imgtec.com> ---- - arch/mips/boot/dts/img/pistachio_marduk.dts | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/arch/mips/boot/dts/img/pistachio_marduk.dts -+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts -@@ -117,7 +117,7 @@ - - &sdhost { - status = "okay"; -- bus-width = <4>; -+ bus-width = <1>; - disable-wp; - }; - -@@ -127,6 +127,7 @@ - - &pin_sdhost_data { - drive-strength = <2>; -+ pins = "mfio17", "mfio18", "mfio19", "mfio20"; - }; - - &pwm { |