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authorDaniel Golle <daniel@makrotopia.org>2018-05-31 19:41:28 +0200
committerDaniel Golle <daniel@makrotopia.org>2018-06-01 15:45:06 +0200
commitdcc34574efba524cf75608c3b61bfa579bfb8aa4 (patch)
tree7ed7970952f1e9a705ae8819c3983844efd79d86 /target/linux/oxnas/patches-4.14/800-oxnas-ehci.patch
parentd44b7b7d312b1d4b920042cac35b86e4f089cd04 (diff)
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oxnas: bring in new oxnas target
Reboot the oxnas target based on Linux 4.14 by rebasing our support on top of the now-existing upstream kernel support. This commit brings oxnas support to the level of v4.17 having upstream drivers for Ethernet, Serial and NAND flash. Botch up OpenWrt's local drivers for EHCI, SATA and PCIe based on the new platform code and device-tree. Re-introduce base-files from old oxnas target which works for now but needs further clean-up towards generic board support. Functional issues: * PCIe won't come up (hence no USB3 on Shuttle KD20) * I2C bus of Akitio myCloud device is likely not to work (missing debounce support in new pinctrl driver) Code-style issues: * plla/pllb needs further cleanup -- currently their users or writing into the syscon regmap after acquireling the clk instead of using defined clk_*_*() functions to setup multipliers and dividors. * PCIe phy needs its own little driver. * SATA driver is a monster and should be split into an mfd having a raidctrl regmap, sata controller, sata ports and sata phy. Tested on MitraStar STG-212 aka. Medion Akoya MD86xxx and Shuttle KD20. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Diffstat (limited to 'target/linux/oxnas/patches-4.14/800-oxnas-ehci.patch')
-rw-r--r--target/linux/oxnas/patches-4.14/800-oxnas-ehci.patch51
1 files changed, 51 insertions, 0 deletions
diff --git a/target/linux/oxnas/patches-4.14/800-oxnas-ehci.patch b/target/linux/oxnas/patches-4.14/800-oxnas-ehci.patch
new file mode 100644
index 0000000000..8fd6f69c1d
--- /dev/null
+++ b/target/linux/oxnas/patches-4.14/800-oxnas-ehci.patch
@@ -0,0 +1,51 @@
+--- a/drivers/usb/host/Kconfig
++++ b/drivers/usb/host/Kconfig
+@@ -334,6 +334,13 @@ config USB_OCTEON_EHCI
+ USB 2.0 device support. All CN6XXX based chips with USB are
+ supported.
+
++config USB_EHCI_OXNAS
++ tristate "OXNAS EHCI Module"
++ depends on USB_EHCI_HCD && ARCH_OXNAS
++ select USB_EHCI_ROOT_HUB_TT
++ ---help---
++ Enable support for the OX820 SOC's on-chip EHCI controller.
++
+ endif # USB_EHCI_HCD
+
+ config USB_OXU210HP_HCD
+--- a/drivers/usb/host/Makefile
++++ b/drivers/usb/host/Makefile
+@@ -43,6 +43,7 @@ obj-$(CONFIG_USB_EHCI_HCD_AT91) += ehci-
+ obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o
+ obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
+ obj-$(CONFIG_USB_W90X900_EHCI) += ehci-w90x900.o
++obj-$(CONFIG_USB_EHCI_OXNAS) += ehci-oxnas.o
+
+ obj-$(CONFIG_USB_OXU210HP_HCD) += oxu210hp-hcd.o
+ obj-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
+--- a/arch/arm/boot/dts/ox820.dtsi
++++ b/arch/arm/boot/dts/ox820.dtsi
+@@ -120,6 +120,22 @@
+ status = "disabled";
+ };
+
++ ehci: ehci@40200100 {
++ compatible = "plxtech,nas782x-ehci";
++ reg = <0x40200100 0xf00>;
++ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&stdclk CLK_820_USBMPH>, <&pllb>, <&stdclk CLK_820_REF600>;
++ clock-names = "usb", "refsrc", "phyref";
++ resets = <&reset RESET_USBHS>, <&reset RESET_USBPHYA>, <&reset RESET_USBPHYB>;
++ reset-names = "host", "phya", "phyb";
++ oxsemi,sys-ctrl = <&sys>;
++ /* Otherwise ref300 is used, which is derived from sata phy
++ * in that case, usb depends on sata initialization */
++ /* FIXME: how to make this dependency explicit ? */
++ oxsemi,ehci_use_pllb;
++ status = "disabled";
++ };
++
+ apb-bridge@44000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;