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authorTomasz Maciej Nowak <tomek_n@o2.pl>2020-03-12 19:03:34 +0100
committerHauke Mehrtens <hauke@hauke-m.de>2020-04-13 22:41:37 +0200
commit779a1c84ea16cdb628adba33f40ded88b5f06707 (patch)
treeae320e590ca60b83d513bd1b38a52adf97f17ae1 /target/linux/mvebu/patches-5.4/527-PCI-aardvark-allow-to-specify-link-capability.patch
parentf72a13b53749c37930e1cb3037a7268b8c01fcd0 (diff)
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mvebu: drop armada-37xx PCI aardvark patches
These patches were necessarry for Atheros and some Intel WiFi cards. After short testing, the current upstream driver state is enough for these WiFi cards to work. If there are still some issues with other devices, the patches could be easily restored. Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
Diffstat (limited to 'target/linux/mvebu/patches-5.4/527-PCI-aardvark-allow-to-specify-link-capability.patch')
-rw-r--r--target/linux/mvebu/patches-5.4/527-PCI-aardvark-allow-to-specify-link-capability.patch43
1 files changed, 0 insertions, 43 deletions
diff --git a/target/linux/mvebu/patches-5.4/527-PCI-aardvark-allow-to-specify-link-capability.patch b/target/linux/mvebu/patches-5.4/527-PCI-aardvark-allow-to-specify-link-capability.patch
deleted file mode 100644
index 739292c1bf..0000000000
--- a/target/linux/mvebu/patches-5.4/527-PCI-aardvark-allow-to-specify-link-capability.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From f70b629e488cc3f2a325ac35476f4f7ae502c5d0 Mon Sep 17 00:00:00 2001
-From: Tomasz Maciej Nowak <tmn505@gmail.com>
-Date: Thu, 14 Jun 2018 14:24:40 +0200
-Subject: [PATCH 1/2] PCI: aardvark: allow to specify link capability
-
-Use DT of_pci_get_max_link_speed() facility to allow specifying link
-capability. If none or unspecified value is given it falls back to gen2,
-which is default for Armada 3700 SoC.
-
-Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
----
- drivers/pci/controller/pci-aardvark.c | 11 +++++++++--
- 1 file changed, 9 insertions(+), 2 deletions(-)
-
---- a/drivers/pci/controller/pci-aardvark.c
-+++ b/drivers/pci/controller/pci-aardvark.c
-@@ -256,6 +256,8 @@ static void advk_pcie_wait_for_retrain(s
-
- static void advk_pcie_setup_hw(struct advk_pcie *pcie)
- {
-+ struct device *dev = &pcie->pdev->dev;
-+ struct device_node *node = dev->of_node;
- u32 reg;
-
- /* Set to Direct mode */
-@@ -290,10 +292,15 @@ static void advk_pcie_setup_hw(struct ad
- PCIE_CORE_CTRL2_TD_ENABLE;
- advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG);
-
-- /* Set GEN2 */
-+ /* Set GEN */
- reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
- reg &= ~PCIE_GEN_SEL_MSK;
-- reg |= SPEED_GEN_2;
-+ if (of_pci_get_max_link_speed(node) == 1)
-+ reg |= SPEED_GEN_1;
-+ else if (of_pci_get_max_link_speed(node) == 3)
-+ reg |= SPEED_GEN_3;
-+ else
-+ reg |= SPEED_GEN_2;
- advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);
-
- /* Set lane X1 */