mpc85xx: add support for Sophos RED 15w Rev.1

Hardware
========
CPU:  Freescale P1010 PowerPC
RAM:  128M DDR3
NAND: 128MiB
ETH:  RTL8211F SGMII PHY
      RTL8367B 5-port RGMII switch
      (not connected to SoC - unmanaged)
WiFi: SparkLan WPEA-121N
       - Atheros AR9382 2T2R abgn
USB:  1x USB 2.0
LED:  System, Router, Internet, Tunnel controllable
      LAN1-4, WAN, Power non-controllable
BTN:  None

Installation
============
1. Power on the device while attached to the Console port.

2. Halt the U-Boot by pressing Enter when prompted.

3. Set the correct bootcmd for booting OpenWRT:
 > setenv bootargs_owrt "setenv bootargs console=ttyS0,115200"
 > setenv bootcmd "run bootargs_owrt;
   nand read 0x1000000 0x300000 0x800000;
   bootm 0x1000000;"
 > saveenv

5. Rename OpenWRT initramfs image to 'kernel.bin' and place it in a
   TFTP server root-directory served on 192.168.1.2/24. Connect your
   computer to one of the LAN-ports.

4. Boot OpenWRT initramfs image with
 > run bootargs_owrt; tftpboot 0x1000000 192.168.1.2:kernel.bin;
   bootm 0x1000000;

6. (Optional)
   Make a Backup of 'sophos-os1', 'sophos-os2' and 'sophos-data' in case
   you ever want to go back to the vendor firmware.

7. Create Ubi Volume on mtd4 by executing
 > ubiformat /dev/mtd4 -y

8. Transfer OpenWRT sysupgrade image to the device via SCP and install it
   with
 > sysupgrade -n <openwrt-image-file>

Back to Stock
=============
If you want to go back to the stock firmware, here is the bootcmd of the
vendor firmware:
 > setenv bootargs console=ttyS0,115200 root=/dev/mtdblock5;
   nand read 0xc00000 0x00300000  0x100000;
   nand read 0x1000000 0x00400000 0x00800000;
   bootm 0x1000000 - 0xc00000

Set it via 'setenv' from the U-Boot shell and don't forget to save it
using 'saveenv'!

After this, boot the OpenWRT initramfs image just like you would for
installation. Write back the three vendor partitions using mtd. Reboot
the device afterwards.

Signed-off-by: David Bauer <mail@david-bauer.net>
[refresh and reorder patches]
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>

1 files changed, 207 insertions, 0 deletions

diff --git a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/red-15w-rev1.dts b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/red-15w-rev1.dts
new file mode 100644
index 0000000000..600426bb6e
--- /dev/null
+++ b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/red-15w-rev1.dts
@@ -0,0 +1,207 @@
+// SPDX-License-Identifier: GPL-2.0-or-later or MIT
+
+/include/ "fsl/p1010si-pre.dtsi"
+
+/ {
+	model = "Sophos RED 15w Rev.1";
+	compatible = "sophos,red-15w-rev1";
+
+	memory {
+		device_type = "memory";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		system_green {
+			gpios = <&gpio0 7 0>;
+			label = "red-15w-rev1:green:system";
+		};
+
+		system_red {
+			gpios = <&gpio0 3 0>;
+			label = "red-15w-rev1:red:system";
+		};
+
+		router {
+			gpios = <&gpio0 5 1>;
+			label = "red-15w-rev1:green:router";
+		};
+
+		internet {
+			gpios = <&gpio0 4 1>;
+			label = "red-15w-rev1:green:internet";
+		};
+
+		tunnel {
+			gpios = <&gpio0 8 1>;
+			label = "red-15w-rev1:green:tunnel";
+		};
+	};
+
+	soc: soc@ffe00000 {
+		ranges = <0x0 0x0 0xffe00000 0x100000>;
+
+		i2c@3000 {
+			eeprom@50 {
+				compatible = "st,24c256";
+				reg = <0x50>;
+			};
+		};
+
+		i2c@3100 {
+			eeprom@52 {
+				compatible = "atmel,24c01";
+				reg = < 0x52 >;
+			};
+		};
+
+		gpio0: gpio-controller@fc00 {
+		};
+
+		usb@22000 {
+			phy_type = "utmi";
+			dr_mode = "host";
+		};
+
+		mdio@24000 {
+			phy0: ethernet-phy@0 {
+				reg = <0x0>;
+			};
+		};
+
+		mdio@25000 {
+			tbi_phy: tbi-phy@11 {
+				reg = <0x11>;
+			};
+		};
+
+		mdio@26000 {
+			status = "disabled";
+		};
+
+		enet0: ethernet@b0000 {
+			phy-connection-type = "rgmii-id";
+
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
+
+		enet1: ethernet@b1000 {
+			phy-handle = <&phy0>;
+			phy-connection-type = "sgmii";
+
+			tbi-handle = <&tbi_phy>;
+		};
+
+		enet2: ethernet@b2000 {
+			status = "disabled";
+		};
+
+		sdhc@2e000 {
+			status = "disabled";
+		};
+	};
+
+	ifc: ifc@ffe1e000 {
+		reg = <0x0 0xffe1e000 0 0x2000>;
+
+		/* NOR, NAND Flashes and CPLD on board */
+		ranges = <0x0 0x0 0x0 0xee000000 0x02000000
+			0x1 0x0 0x0 0xff800000 0x00010000
+			0x3 0x0 0x0 0xffb00000 0x00000020>;
+
+		nand@1,0 {
+			compatible = "fsl,ifc-nand";
+			reg = <0x1 0x0 0x10000>;
+
+			partitions {
+				compatible = "fixed-partitions";
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				/*
+				 * Original partition layout:
+				 * 0x000000000000-0x000000100000 : "NAND U-Boot Image"
+				 * 0x000000100000-0x000000200000 : "NAND U-Boot Environment"
+				 * 0x000000200000-0x000000300000 : "Provisioning"
+				 *  - OS-Image 1
+				 * 0x000000300000-0x000000400000 : "fdt1"
+				 * 0x000000400000-0x000000c00000 : "uimage1"
+				 * 0x000000c00000-0x000001c00000 : "rootfs1"
+				 *  - OS-Image 2
+				 * 0x000001c00000-0x000001d00000 : "fdt2"
+				 * 0x000001d00000-0x000002500000 : "uimage2"
+				 * 0x000002500000-0x000003500000 : "rootfs2"
+				 *  - Empty
+				 * 0x000003500000-0x000008000000 : "data"
+				 */
+
+				partition@0 {
+					reg = <0x0 0x100000>;
+					label = "u-boot";
+					read-only;
+				};
+
+				partition@100000 {
+					reg = <0x100000 0x100000>;
+					label = "u-boot-env";
+				};
+
+				partition@200000 {
+					reg = <0x200000 0x100000>;
+					label = "provisioning";
+					read-only;
+				};
+
+				partition@300000 {
+					reg = <0x300000 0x800000>;
+					label = "kernel";
+				};
+
+				partition@b00000 {
+					reg = <0xb00000 0x7500000>;
+					label = "ubi";
+				};
+
+				oem-partition@300000 {
+					reg = <0x300000 0x1900000>;
+					label = "sophos-os1";
+				};
+
+				oem-partition@1c00000 {
+					reg = <0x1c00000 0x1900000>;
+					label = "sophos-os2";
+				};
+
+				oem-partition@3500000 {
+					reg = <0x3500000 0x4b00000>;
+					label = "sophos-data";
+				};
+			};
+		};
+	};
+
+	pci0: pcie@ffe09000 {
+		status = "disabled";
+	};
+
+	pci1: pcie@ffe0a000 {
+		reg = <0 0xffe0a000 0 0x1000>;
+		ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+			  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+		pcie@0 {
+			ranges = <0x2000000 0x0 0x80000000
+				  0x2000000 0x0 0x80000000
+				  0x0 0x20000000
+
+				  0x1000000 0x0 0x0
+				  0x1000000 0x0 0x0
+				  0x0 0x100000>;
+		};
+	};
+};
+
+/include/ "fsl/p1010si-post.dtsi"