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author | John Crispin <john@openwrt.org> | 2016-03-21 20:42:51 +0000 |
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committer | John Crispin <john@openwrt.org> | 2016-03-21 20:42:51 +0000 |
commit | 5d2f529c9b83d5f769258928b5ddd82f4dc9979e (patch) | |
tree | 65ecb999d7bfda861006ffba75f375c1d7c8260d /target/linux/mediatek/patches/0009-dt-bindings-ARM-Mediatek-Document-devicetree-binding.patch | |
parent | c8a6c583fc5f5c0834f993b591d6bb52d958c99a (diff) | |
download | upstream-5d2f529c9b83d5f769258928b5ddd82f4dc9979e.tar.gz upstream-5d2f529c9b83d5f769258928b5ddd82f4dc9979e.tar.bz2 upstream-5d2f529c9b83d5f769258928b5ddd82f4dc9979e.zip |
mediatek: bump to v4.4
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 49064
Diffstat (limited to 'target/linux/mediatek/patches/0009-dt-bindings-ARM-Mediatek-Document-devicetree-binding.patch')
-rw-r--r-- | target/linux/mediatek/patches/0009-dt-bindings-ARM-Mediatek-Document-devicetree-binding.patch | 139 |
1 files changed, 0 insertions, 139 deletions
diff --git a/target/linux/mediatek/patches/0009-dt-bindings-ARM-Mediatek-Document-devicetree-binding.patch b/target/linux/mediatek/patches/0009-dt-bindings-ARM-Mediatek-Document-devicetree-binding.patch deleted file mode 100644 index 27587e5909..0000000000 --- a/target/linux/mediatek/patches/0009-dt-bindings-ARM-Mediatek-Document-devicetree-binding.patch +++ /dev/null @@ -1,139 +0,0 @@ -From 87043a64dd5185dc076b3c3ab2e421b3a8c47798 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer <s.hauer@pengutronix.de> -Date: Thu, 23 Apr 2015 10:35:43 +0200 -Subject: [PATCH 09/76] dt-bindings: ARM: Mediatek: Document devicetree - bindings for clock/reset controllers - -This adds the binding documentation for the apmixedsys, perisys and -infracfg controllers found on Mediatek SoCs. - -Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> ---- - .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 23 +++++++++++++++ - .../bindings/arm/mediatek/mediatek,infracfg.txt | 30 ++++++++++++++++++++ - .../bindings/arm/mediatek/mediatek,pericfg.txt | 30 ++++++++++++++++++++ - .../bindings/arm/mediatek/mediatek,topckgen.txt | 23 +++++++++++++++ - 4 files changed, 106 insertions(+) - create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt - create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt - create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt - create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt - ---- /dev/null -+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt -@@ -0,0 +1,23 @@ -+Mediatek apmixedsys controller -+============================== -+ -+The Mediatek apmixedsys controller provides the PLLs to the system. -+ -+Required Properties: -+ -+- compatible: Should be: -+ - "mediatek,mt8135-apmixedsys" -+ - "mediatek,mt8173-apmixedsys" -+- #clock-cells: Must be 1 -+ -+The apmixedsys controller uses the common clk binding from -+Documentation/devicetree/bindings/clock/clock-bindings.txt -+The available clocks are defined in dt-bindings/clock/mt*-clk.h. -+ -+Example: -+ -+apmixedsys: apmixedsys@10209000 { -+ compatible = "mediatek,mt8173-apmixedsys"; -+ reg = <0 0x10209000 0 0x1000>; -+ #clock-cells = <1>; -+}; ---- /dev/null -+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt -@@ -0,0 +1,30 @@ -+Mediatek infracfg controller -+============================ -+ -+The Mediatek infracfg controller provides various clocks and reset -+outputs to the system. -+ -+Required Properties: -+ -+- compatible: Should be: -+ - "mediatek,mt8135-infracfg", "syscon" -+ - "mediatek,mt8173-infracfg", "syscon" -+- #clock-cells: Must be 1 -+- #reset-cells: Must be 1 -+ -+The infracfg controller uses the common clk binding from -+Documentation/devicetree/bindings/clock/clock-bindings.txt -+The available clocks are defined in dt-bindings/clock/mt*-clk.h. -+Also it uses the common reset controller binding from -+Documentation/devicetree/bindings/reset/reset.txt. -+The available reset outputs are defined in -+dt-bindings/reset-controller/mt*-resets.h -+ -+Example: -+ -+infracfg: infracfg@10001000 { -+ compatible = "mediatek,mt8173-infracfg", "syscon"; -+ reg = <0 0x10001000 0 0x1000>; -+ #clock-cells = <1>; -+ #reset-cells = <1>; -+}; ---- /dev/null -+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt -@@ -0,0 +1,30 @@ -+Mediatek pericfg controller -+=========================== -+ -+The Mediatek pericfg controller provides various clocks and reset -+outputs to the system. -+ -+Required Properties: -+ -+- compatible: Should be: -+ - "mediatek,mt8135-pericfg", "syscon" -+ - "mediatek,mt8173-pericfg", "syscon" -+- #clock-cells: Must be 1 -+- #reset-cells: Must be 1 -+ -+The pericfg controller uses the common clk binding from -+Documentation/devicetree/bindings/clock/clock-bindings.txt -+The available clocks are defined in dt-bindings/clock/mt*-clk.h. -+Also it uses the common reset controller binding from -+Documentation/devicetree/bindings/reset/reset.txt. -+The available reset outputs are defined in -+dt-bindings/reset-controller/mt*-resets.h -+ -+Example: -+ -+pericfg: pericfg@10003000 { -+ compatible = "mediatek,mt8173-pericfg", "syscon"; -+ reg = <0 0x10003000 0 0x1000>; -+ #clock-cells = <1>; -+ #reset-cells = <1>; -+}; ---- /dev/null -+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt -@@ -0,0 +1,23 @@ -+Mediatek topckgen controller -+============================ -+ -+The Mediatek topckgen controller provides various clocks to the system. -+ -+Required Properties: -+ -+- compatible: Should be: -+ - "mediatek,mt8135-topckgen" -+ - "mediatek,mt8173-topckgen" -+- #clock-cells: Must be 1 -+ -+The topckgen controller uses the common clk binding from -+Documentation/devicetree/bindings/clock/clock-bindings.txt -+The available clocks are defined in dt-bindings/clock/mt*-clk.h. -+ -+Example: -+ -+topckgen: topckgen@10000000 { -+ compatible = "mediatek,mt8173-topckgen"; -+ reg = <0 0x10000000 0 0x1000>; -+ #clock-cells = <1>; -+}; |