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| author | Daniel Golle <daniel@makrotopia.org> | 2023-03-27 17:50:54 +0100 |
|---|---|---|
| committer | Daniel Golle <daniel@makrotopia.org> | 2023-03-27 19:07:54 +0100 |
| commit | 5b972d7272c06d17cc0a5a8374dbfb9a9dd33fe1 (patch) | |
| tree | 7fd6aeadd3518f57d163c94d6be2fa33120ee180 /target/linux/mediatek/patches-5.15 | |
| parent | a438a805ebe3f1aa6f25e31ee2152c60e3223343 (diff) | |
| download | upstream-5b972d7272c06d17cc0a5a8374dbfb9a9dd33fe1.tar.gz upstream-5b972d7272c06d17cc0a5a8374dbfb9a9dd33fe1.tar.bz2 upstream-5b972d7272c06d17cc0a5a8374dbfb9a9dd33fe1.zip | |
generic: mtk_eth_soc: allow setting MDIO clock frequency
Backport patch allowing to set the MDIO bus clock frequency.
By default the MDIO bus clock runs on 2.5 MHz, allow increasing it
up to 25 MHz.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Diffstat (limited to 'target/linux/mediatek/patches-5.15')
| -rw-r--r-- | target/linux/mediatek/patches-5.15/703-v5.17-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-ac.patch | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/mediatek/patches-5.15/703-v5.17-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-ac.patch b/target/linux/mediatek/patches-5.15/703-v5.17-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-ac.patch index 554619c017..d72776d9c4 100644 --- a/target/linux/mediatek/patches-5.15/703-v5.17-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-ac.patch +++ b/target/linux/mediatek/patches-5.15/703-v5.17-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-ac.patch @@ -103,7 +103,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> ret = mtk_mdio_busy_wait(eth); if (ret < 0) -@@ -727,6 +770,7 @@ static int mtk_mdio_init(struct mtk_eth +@@ -729,6 +772,7 @@ static int mtk_mdio_init(struct mtk_eth eth->mii_bus->name = "mdio"; eth->mii_bus->read = mtk_mdio_read; eth->mii_bus->write = mtk_mdio_write; @@ -113,7 +113,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -369,9 +369,12 @@ +@@ -376,9 +376,12 @@ #define PHY_IAC_ADDR_MASK GENMASK(24, 20) #define PHY_IAC_ADDR(x) FIELD_PREP(PHY_IAC_ADDR_MASK, (x)) #define PHY_IAC_CMD_MASK GENMASK(19, 18) |