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author | Chuanhong Guo <gch981213@gmail.com> | 2022-04-07 10:05:25 +0800 |
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committer | Chuanhong Guo <gch981213@gmail.com> | 2022-04-28 18:06:00 +0800 |
commit | 861efe158ac56da2e00637aed704a77994bec54c (patch) | |
tree | 539836b2d4f7ec33792b2dda0b6ab7f45455c35f /target/linux/mediatek/patches-5.15/120-04-v5.18-spi-spi-mem-Introduce-a-capability-structure.patch | |
parent | 3e5925225ec27519f1eccc1605fe9a76303d539b (diff) | |
download | upstream-861efe158ac56da2e00637aed704a77994bec54c.tar.gz upstream-861efe158ac56da2e00637aed704a77994bec54c.tar.bz2 upstream-861efe158ac56da2e00637aed704a77994bec54c.zip |
mediatek: v5.15: backport spi-mem ecc support
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Diffstat (limited to 'target/linux/mediatek/patches-5.15/120-04-v5.18-spi-spi-mem-Introduce-a-capability-structure.patch')
-rw-r--r-- | target/linux/mediatek/patches-5.15/120-04-v5.18-spi-spi-mem-Introduce-a-capability-structure.patch | 78 |
1 files changed, 78 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-5.15/120-04-v5.18-spi-spi-mem-Introduce-a-capability-structure.patch b/target/linux/mediatek/patches-5.15/120-04-v5.18-spi-spi-mem-Introduce-a-capability-structure.patch new file mode 100644 index 0000000000..bcd2ee8004 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/120-04-v5.18-spi-spi-mem-Introduce-a-capability-structure.patch @@ -0,0 +1,78 @@ +From 3e45577e70cbf8fdc5c13033114989794a3797d5 Mon Sep 17 00:00:00 2001 +From: Miquel Raynal <miquel.raynal@bootlin.com> +Date: Thu, 27 Jan 2022 10:17:56 +0100 +Subject: [PATCH 04/15] spi: spi-mem: Introduce a capability structure + +Create a spi_controller_mem_caps structure and put it within the +spi_controller structure close to the spi_controller_mem_ops +strucure. So far the only field in this structure is the support for dtr +operations, but soon we will add another parameter. + +Also create a helper to parse the capabilities and check if the +requested capability has been set or not. + +Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> +Reviewed-by: Pratyush Yadav <p.yadav@ti.com> +Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> +Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> +Reviewed-by: Mark Brown <broonie@kernel.org> +Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-2-miquel.raynal@bootlin.com +(cherry picked from commit 4a3cc7fb6e63bcfdedec25364738f1493345bd20) +--- + include/linux/spi/spi-mem.h | 11 +++++++++++ + include/linux/spi/spi.h | 3 +++ + 2 files changed, 14 insertions(+) + +diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h +index 85e2ff7b840d..38e5d45c9842 100644 +--- a/include/linux/spi/spi-mem.h ++++ b/include/linux/spi/spi-mem.h +@@ -285,6 +285,17 @@ struct spi_controller_mem_ops { + unsigned long timeout_ms); + }; + ++/** ++ * struct spi_controller_mem_caps - SPI memory controller capabilities ++ * @dtr: Supports DTR operations ++ */ ++struct spi_controller_mem_caps { ++ bool dtr; ++}; ++ ++#define spi_mem_controller_is_capable(ctlr, cap) \ ++ ((ctlr)->mem_caps && (ctlr)->mem_caps->cap) ++ + /** + * struct spi_mem_driver - SPI memory driver + * @spidrv: inherit from a SPI driver +diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h +index 6b0b686f6f90..8ac58b1a2a9f 100644 +--- a/include/linux/spi/spi.h ++++ b/include/linux/spi/spi.h +@@ -23,6 +23,7 @@ struct software_node; + struct spi_controller; + struct spi_transfer; + struct spi_controller_mem_ops; ++struct spi_controller_mem_caps; + + /* + * INTERFACES between SPI master-side drivers and SPI slave protocol handlers, +@@ -419,6 +420,7 @@ extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 ch + * @mem_ops: optimized/dedicated operations for interactions with SPI memory. + * This field is optional and should only be implemented if the + * controller has native support for memory like operations. ++ * @mem_caps: controller capabilities for the handling of memory operations. + * @unprepare_message: undo any work done by prepare_message(). + * @slave_abort: abort the ongoing transfer request on an SPI slave controller + * @cs_gpios: LEGACY: array of GPIO descs to use as chip select lines; one per +@@ -643,6 +645,7 @@ struct spi_controller { + + /* Optimized handlers for SPI memory-like operations. */ + const struct spi_controller_mem_ops *mem_ops; ++ const struct spi_controller_mem_caps *mem_caps; + + /* gpio chip select */ + int *cs_gpios; +-- +2.35.1 + |