diff options
author | John Audia <graysky@archlinux.us> | 2021-08-28 07:40:00 -0400 |
---|---|---|
committer | Hauke Mehrtens <hauke@hauke-m.de> | 2021-08-29 16:30:20 +0200 |
commit | 6b1cd3e3451ab1057dd3b27fd3f9834e1765d20c (patch) | |
tree | f37ac8a1fb173bfc69d475bfa921e5f9f0253185 /target/linux/mediatek/patches-5.10/603-ARM-dts-mediatek-Update-mt7629-PCIe-node.patch | |
parent | 1c8214d6f2c70db40dad0d111954802668b174d4 (diff) | |
download | upstream-6b1cd3e3451ab1057dd3b27fd3f9834e1765d20c.tar.gz upstream-6b1cd3e3451ab1057dd3b27fd3f9834e1765d20c.tar.bz2 upstream-6b1cd3e3451ab1057dd3b27fd3f9834e1765d20c.zip |
kernel: bump 5.10 to 5.10.61
Manually rebased:
bcm27xx/patches-5.10/950-1031-net-lan78xx-Ack-pending-PHY-ints-when-resetting.patch
Removed upstreamed:
mvebu/patches-5.10/101-cpufreq-armada-37xx-forbid-cpufreq-for-1.2-GHz-variant.patch
All other patches automatically rebased.
Build system: x86_64
Build-tested: bcm2711/RPi4B
Run-tested: bcm2711/RPi4B
No dmesg regressions, everything functional
Signed-off-by: John Audia <graysky@archlinux.us>
Diffstat (limited to 'target/linux/mediatek/patches-5.10/603-ARM-dts-mediatek-Update-mt7629-PCIe-node.patch')
-rw-r--r-- | target/linux/mediatek/patches-5.10/603-ARM-dts-mediatek-Update-mt7629-PCIe-node.patch | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/mediatek/patches-5.10/603-ARM-dts-mediatek-Update-mt7629-PCIe-node.patch b/target/linux/mediatek/patches-5.10/603-ARM-dts-mediatek-Update-mt7629-PCIe-node.patch index 252ef080f5..ce72ad659a 100644 --- a/target/linux/mediatek/patches-5.10/603-ARM-dts-mediatek-Update-mt7629-PCIe-node.patch +++ b/target/linux/mediatek/patches-5.10/603-ARM-dts-mediatek-Update-mt7629-PCIe-node.patch @@ -149,7 +149,7 @@ Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com> &pciephy1 { --- a/arch/arm/boot/dts/mt7629.dtsi +++ b/arch/arm/boot/dts/mt7629.dtsi -@@ -382,16 +382,21 @@ +@@ -376,16 +376,21 @@ #reset-cells = <1>; }; @@ -177,7 +177,7 @@ Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com> clocks = <&pciesys CLK_PCIE_P1_MAC_EN>, <&pciesys CLK_PCIE_P0_AHB_EN>, <&pciesys CLK_PCIE_P1_AUX_EN>, -@@ -412,21 +417,19 @@ +@@ -406,21 +411,19 @@ power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>; bus-range = <0x00 0xff>; ranges = <0x82000000 0 0x20000000 0x20000000 0 0x10000000>; |