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| author | John Crispin <john@phrozen.org> | 2017-08-18 18:11:52 +0200 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2017-08-18 18:41:41 +0200 |
| commit | 1f068588efddf0175e954ffc07ec8478bddd52c7 (patch) | |
| tree | 3e65bb1b6d076cac2597db4bcbf71a9fedee1099 /target/linux/mediatek/patches-4.9/0053-net-dsa-mediatek-add-software-phy-polling.patch | |
| parent | 364befeccf01c07049b492d90e98c2c13457c7c3 (diff) | |
| download | upstream-1f068588efddf0175e954ffc07ec8478bddd52c7.tar.gz upstream-1f068588efddf0175e954ffc07ec8478bddd52c7.tar.bz2 upstream-1f068588efddf0175e954ffc07ec8478bddd52c7.zip | |
mediatek: update to latest kernel patchset from v4.13-rc
Signed-off-by: Muciri Gatimu <muciri@openmesh.com>
Signed-off-by: Shashidhar Lakkavalli <shashidhar.lakkavalli@openmesh.com>
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/mediatek/patches-4.9/0053-net-dsa-mediatek-add-software-phy-polling.patch')
| -rw-r--r-- | target/linux/mediatek/patches-4.9/0053-net-dsa-mediatek-add-software-phy-polling.patch | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-4.9/0053-net-dsa-mediatek-add-software-phy-polling.patch b/target/linux/mediatek/patches-4.9/0053-net-dsa-mediatek-add-software-phy-polling.patch new file mode 100644 index 0000000000..a41bcb0262 --- /dev/null +++ b/target/linux/mediatek/patches-4.9/0053-net-dsa-mediatek-add-software-phy-polling.patch @@ -0,0 +1,68 @@ +From 53eec2c3580e63fdebfc25ae324f30cd8aa4403b Mon Sep 17 00:00:00 2001 +From: John Crispin <john@phrozen.org> +Date: Thu, 10 Aug 2017 16:00:46 +0200 +Subject: [PATCH 53/57] net: dsa: mediatek: add software phy polling + +Signed-off-by: John Crispin <john@phrozen.org> +--- + drivers/net/dsa/mt7530.c | 38 ++++++++++++++++++++++++++++++++++++++ + drivers/net/dsa/mt7530.h | 1 + + 2 files changed, 39 insertions(+) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -728,6 +728,44 @@ static void mt7530_adjust_link(struct ds + * all finished. + */ + mt7623_pad_clk_setup(ds); ++ } else { ++ u16 lcl_adv = 0, rmt_adv = 0; ++ u8 flowctrl; ++ u32 mcr = PMCR_USERP_LINK | PMCR_FORCE_MODE; ++ ++ switch (phydev->speed) { ++ case SPEED_1000: ++ mcr |= PMCR_FORCE_SPEED_1000; ++ break; ++ case SPEED_100: ++ mcr |= PMCR_FORCE_SPEED_100; ++ break; ++ }; ++ ++ if (phydev->link) ++ mcr |= PMCR_FORCE_LNK; ++ ++ if (phydev->duplex) { ++ mcr |= PMCR_FORCE_FDX; ++ ++ if (phydev->pause) ++ rmt_adv = LPA_PAUSE_CAP; ++ if (phydev->asym_pause) ++ rmt_adv |= LPA_PAUSE_ASYM; ++ ++ if (phydev->advertising & ADVERTISED_Pause) ++ lcl_adv |= ADVERTISE_PAUSE_CAP; ++ if (phydev->advertising & ADVERTISED_Asym_Pause) ++ lcl_adv |= ADVERTISE_PAUSE_ASYM; ++ ++ flowctrl = mii_resolve_flowctrl_fdx(lcl_adv, rmt_adv); ++ ++ if (flowctrl & FLOW_CTRL_TX) ++ mcr |= PMCR_TX_FC_EN; ++ if (flowctrl & FLOW_CTRL_RX) ++ mcr |= PMCR_RX_FC_EN; ++ } ++ mt7530_write(priv, MT7530_PMCR_P(port), mcr); + } + } + +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -155,6 +155,7 @@ enum mt7530_stp_state { + #define PMCR_TX_FC_EN BIT(5) + #define PMCR_RX_FC_EN BIT(4) + #define PMCR_FORCE_SPEED_1000 BIT(3) ++#define PMCR_FORCE_SPEED_100 BIT(2) + #define PMCR_FORCE_FDX BIT(1) + #define PMCR_FORCE_LNK BIT(0) + #define PMCR_COMMON_LINK (PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | \ |