mediatek: update patches

* fixes NAND
* adds latest ethernet patches

Signed-off-by: John Crispin <john@phrozen.org>

1 files changed, 98 insertions, 0 deletions

diff --git a/target/linux/mediatek/patches-4.4/0073-of-mtd-prepare-helper-reading-NAND-ECC-algo-from-DT.patch b/target/linux/mediatek/patches-4.4/0073-of-mtd-prepare-helper-reading-NAND-ECC-algo-from-DT.patch
new file mode 100644
index 0000000000..99eae20fef
--- /dev/null
+++ b/target/linux/mediatek/patches-4.4/0073-of-mtd-prepare-helper-reading-NAND-ECC-algo-from-DT.patch
@@ -0,0 +1,98 @@
+From 410a91f6efa1c4c3c4369d1dd2c31286749dff33 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
+Date: Wed, 23 Mar 2016 11:19:01 +0100
+Subject: [PATCH 073/102] of: mtd: prepare helper reading NAND ECC algo from
+ DT
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+NAND subsystem is being slightly reworked to store ECC details in
+separated fields. In future we'll want to add support for more DT
+properties as specifying every possible setup with a single
+"nand-ecc-mode" is a pretty bad idea.
+To allow this let's add a helper that will support something like
+"nand-ecc-algo" in future. Right now we use it for keeping backward
+compatibility.
+
+Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
+Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
+---
+ drivers/of/of_mtd.c    |   36 ++++++++++++++++++++++++++++++++++++
+ include/linux/of_mtd.h |    6 ++++++
+ 2 files changed, 42 insertions(+)
+
+diff --git a/drivers/of/of_mtd.c b/drivers/of/of_mtd.c
+index b7361ed..15d056e 100644
+--- a/drivers/of/of_mtd.c
++++ b/drivers/of/of_mtd.c
+@@ -50,6 +50,42 @@ int of_get_nand_ecc_mode(struct device_node *np)
+ EXPORT_SYMBOL_GPL(of_get_nand_ecc_mode);
+ 
+ /**
++ * of_get_nand_ecc_algo - Get nand ecc algorithm for given device_node
++ * @np:	Pointer to the given device_node
++ *
++ * The function gets ecc algorithm and returns its enum value, or errno in error
++ * case.
++ */
++int of_get_nand_ecc_algo(struct device_node *np)
++{
++	const char *pm;
++	int err;
++
++	/*
++	 * TODO: Read ECC algo OF property and map it to enum nand_ecc_algo.
++	 * It's not implemented yet as currently NAND subsystem ignores
++	 * algorithm explicitly set this way. Once it's handled we should
++	 * document & support new property.
++	 */
++
++	/*
++	 * For backward compatibility we also read "nand-ecc-mode" checking
++	 * for some obsoleted values that were specifying ECC algorithm.
++	 */
++	err = of_property_read_string(np, "nand-ecc-mode", &pm);
++	if (err < 0)
++		return err;
++
++	if (!strcasecmp(pm, "soft"))
++		return NAND_ECC_HAMMING;
++	else if (!strcasecmp(pm, "soft_bch"))
++		return NAND_ECC_BCH;
++
++	return -ENODEV;
++}
++EXPORT_SYMBOL_GPL(of_get_nand_ecc_algo);
++
++/**
+  * of_get_nand_ecc_step_size - Get ECC step size associated to
+  * the required ECC strength (see below).
+  * @np:	Pointer to the given device_node
+diff --git a/include/linux/of_mtd.h b/include/linux/of_mtd.h
+index e266caa..0f6aca5 100644
+--- a/include/linux/of_mtd.h
++++ b/include/linux/of_mtd.h
+@@ -13,6 +13,7 @@
+ 
+ #include <linux/of.h>
+ int of_get_nand_ecc_mode(struct device_node *np);
++int of_get_nand_ecc_algo(struct device_node *np);
+ int of_get_nand_ecc_step_size(struct device_node *np);
+ int of_get_nand_ecc_strength(struct device_node *np);
+ int of_get_nand_bus_width(struct device_node *np);
+@@ -25,6 +26,11 @@ static inline int of_get_nand_ecc_mode(struct device_node *np)
+ 	return -ENOSYS;
+ }
+ 
++static inline int of_get_nand_ecc_algo(struct device_node *np)
++{
++	return -ENOSYS;
++}
++
+ static inline int of_get_nand_ecc_step_size(struct device_node *np)
+ {
+ 	return -ENOSYS;
+-- 
+1.7.10.4
+