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author | John Crispin <john@openwrt.org> | 2016-03-21 20:42:51 +0000 |
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committer | John Crispin <john@openwrt.org> | 2016-03-21 20:42:51 +0000 |
commit | 5d2f529c9b83d5f769258928b5ddd82f4dc9979e (patch) | |
tree | 65ecb999d7bfda861006ffba75f375c1d7c8260d /target/linux/mediatek/patches-4.4/0036-soc-mediatek-PMIC-wrap-SPI_WRITE-needs-a-different-b.patch | |
parent | c8a6c583fc5f5c0834f993b591d6bb52d958c99a (diff) | |
download | upstream-5d2f529c9b83d5f769258928b5ddd82f4dc9979e.tar.gz upstream-5d2f529c9b83d5f769258928b5ddd82f4dc9979e.tar.bz2 upstream-5d2f529c9b83d5f769258928b5ddd82f4dc9979e.zip |
mediatek: bump to v4.4
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 49064
Diffstat (limited to 'target/linux/mediatek/patches-4.4/0036-soc-mediatek-PMIC-wrap-SPI_WRITE-needs-a-different-b.patch')
-rw-r--r-- | target/linux/mediatek/patches-4.4/0036-soc-mediatek-PMIC-wrap-SPI_WRITE-needs-a-different-b.patch | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-4.4/0036-soc-mediatek-PMIC-wrap-SPI_WRITE-needs-a-different-b.patch b/target/linux/mediatek/patches-4.4/0036-soc-mediatek-PMIC-wrap-SPI_WRITE-needs-a-different-b.patch new file mode 100644 index 0000000000..e18f47d0c3 --- /dev/null +++ b/target/linux/mediatek/patches-4.4/0036-soc-mediatek-PMIC-wrap-SPI_WRITE-needs-a-different-b.patch @@ -0,0 +1,66 @@ +From 2028a24d161da25b827b394bdcec4deba5d2efd9 Mon Sep 17 00:00:00 2001 +From: John Crispin <blogic@openwrt.org> +Date: Wed, 20 Jan 2016 10:21:42 +0100 +Subject: [PATCH 36/53] soc: mediatek: PMIC wrap: SPI_WRITE needs a different + bitmask for MT2701/7623 + +Different SoCs will use different bitmask for the SPI_WRITE command. This +patch defines the bitmask in the pmic_wrapper_type struct. This allows us +to support new SoCs with a different bitmask to the one currently used. + +Signed-off-by: John Crispin <blogic@openwrt.org> +--- + drivers/soc/mediatek/mtk-pmic-wrap.c | 11 +++++++---- + 1 file changed, 7 insertions(+), 4 deletions(-) + +diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c +index 9df1135..8ce1bad 100644 +--- a/drivers/soc/mediatek/mtk-pmic-wrap.c ++++ b/drivers/soc/mediatek/mtk-pmic-wrap.c +@@ -372,6 +372,7 @@ struct pmic_wrapper_type { + enum pwrap_type type; + u32 arb_en_all; + u32 int_en_all; ++ u32 spi_w; + int (*init_reg_clock)(struct pmic_wrapper *wrp); + int (*init_soc_specific)(struct pmic_wrapper *wrp); + }; +@@ -511,15 +512,15 @@ static int pwrap_reset_spislave(struct pmic_wrapper *wrp) + pwrap_writel(wrp, 1, PWRAP_MAN_EN); + pwrap_writel(wrp, 0, PWRAP_DIO_EN); + +- pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_CSL, ++ pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_CSL, + PWRAP_MAN_CMD); +- pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_OUTS, ++ pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_OUTS, + PWRAP_MAN_CMD); +- pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_CSH, ++ pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_CSH, + PWRAP_MAN_CMD); + + for (i = 0; i < 4; i++) +- pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_OUTS, ++ pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_OUTS, + PWRAP_MAN_CMD); + + ret = pwrap_wait_for_state(wrp, pwrap_is_sync_idle); +@@ -827,6 +828,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = { + .type = PWRAP_MT8135, + .arb_en_all = 0x1ff, + .int_en_all = ~(BIT(31) | BIT(1)), ++ .spi_w = PWRAP_MAN_CMD_SPI_WRITE, + .init_reg_clock = pwrap_mt8135_init_reg_clock, + .init_soc_specific = pwrap_mt8135_init_soc_specific, + }; +@@ -836,6 +838,7 @@ static struct pmic_wrapper_type pwrap_mt8173 = { + .type = PWRAP_MT8173, + .arb_en_all = 0x3f, + .int_en_all = ~(BIT(31) | BIT(1)), ++ .spi_w = PWRAP_MAN_CMD_SPI_WRITE, + .init_reg_clock = pwrap_mt8173_init_reg_clock, + .init_soc_specific = pwrap_mt8173_init_soc_specific, + }; +-- +1.7.10.4 + |