layerscape: add patches-5.4

Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release
which was tagged LSDK-20.04-V5.4.
https://source.codeaurora.org/external/qoriq/qoriq-components/linux/

For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in
LSDK, port the dts patches from 4.14.

The patches are sorted into the following categories:
  301-arch-xxxx
  302-dts-xxxx
  303-core-xxxx
  701-net-xxxx
  801-audio-xxxx
  802-can-xxxx
  803-clock-xxxx
  804-crypto-xxxx
  805-display-xxxx
  806-dma-xxxx
  807-gpio-xxxx
  808-i2c-xxxx
  809-jailhouse-xxxx
  810-keys-xxxx
  811-kvm-xxxx
  812-pcie-xxxx
  813-pm-xxxx
  814-qe-xxxx
  815-sata-xxxx
  816-sdhc-xxxx
  817-spi-xxxx
  818-thermal-xxxx
  819-uart-xxxx
  820-usb-xxxx
  821-vfio-xxxx

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>

1 files changed, 85 insertions, 0 deletions

diff --git a/target/linux/layerscape/patches-5.4/805-display-0001-drm-arm-mali-dp-Add-display-QoS-interface-configurat.patch b/target/linux/layerscape/patches-5.4/805-display-0001-drm-arm-mali-dp-Add-display-QoS-interface-configurat.patch
new file mode 100644
index 0000000000..c27e34fc0b
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/805-display-0001-drm-arm-mali-dp-Add-display-QoS-interface-configurat.patch
@@ -0,0 +1,85 @@
+From dae2475df84cd77c6f7245984869897c0eb0f84e Mon Sep 17 00:00:00 2001
+From: Wen He <wen.he_1@nxp.com>
+Date: Tue, 10 Sep 2019 15:01:00 +0800
+Subject: [PATCH] drm/arm/mali-dp: Add display QoS interface configuration for
+ Mali DP500
+
+Configure the display Quality of service (QoS) levels priority if the
+optional property node "arm,malidp-aqros-value" is defined in DTS file.
+
+QoS signaling using AQROS and AWQOS AXI interface signals, the AQROS is
+driven from the "RQOS" register, so needed to program the RQOS register
+to avoid the high resolutions flicker issue on the LS1028A platform.
+
+Signed-off-by: Wen He <wen.he_1@nxp.com>
+---
+ drivers/gpu/drm/arm/malidp_drv.c  |  6 ++++++
+ drivers/gpu/drm/arm/malidp_hw.c   |  9 +++++++++
+ drivers/gpu/drm/arm/malidp_hw.h   |  3 +++
+ drivers/gpu/drm/arm/malidp_regs.h | 10 ++++++++++
+ 4 files changed, 28 insertions(+)
+
+--- a/drivers/gpu/drm/arm/malidp_drv.c
++++ b/drivers/gpu/drm/arm/malidp_drv.c
+@@ -817,6 +817,12 @@ static int malidp_bind(struct device *de
+ 
+ 	malidp->core_id = version;
+ 
++	ret = of_property_read_u32(dev->of_node,
++					"arm,malidp-arqos-value",
++					&hwdev->arqos_value);
++	if (ret)
++		hwdev->arqos_value = 0x0;
++
+ 	/* set the number of lines used for output of RGB data */
+ 	ret = of_property_read_u8_array(dev->of_node,
+ 					"arm,malidp-output-port-lines",
+--- a/drivers/gpu/drm/arm/malidp_hw.c
++++ b/drivers/gpu/drm/arm/malidp_hw.c
+@@ -379,6 +379,15 @@ static void malidp500_modeset(struct mal
+ 		malidp_hw_setbits(hwdev, MALIDP_DISP_FUNC_ILACED, MALIDP_DE_DISPLAY_FUNC);
+ 	else
+ 		malidp_hw_clearbits(hwdev, MALIDP_DISP_FUNC_ILACED, MALIDP_DE_DISPLAY_FUNC);
++
++	/*
++	 * Program the RQoS register to avoid high resolutions flicker
++	 * issue on the LS1028A.
++	 */
++	if (hwdev->arqos_value) {
++		val = hwdev->arqos_value;
++		malidp_hw_setbits(hwdev, val, MALIDP500_RQOS_QUALITY);
++	}
+ }
+ 
+ int malidp_format_get_bpp(u32 fmt)
+--- a/drivers/gpu/drm/arm/malidp_hw.h
++++ b/drivers/gpu/drm/arm/malidp_hw.h
+@@ -251,6 +251,9 @@ struct malidp_hw_device {
+ 
+ 	/* size of memory used for rotating layers, up to two banks available */
+ 	u32 rotation_memory[2];
++
++	/* priority level of RQOS register used for driven the ARQOS signal */
++	u32 arqos_value;
+ };
+ 
+ static inline u32 malidp_hw_read(struct malidp_hw_device *hwdev, u32 reg)
+--- a/drivers/gpu/drm/arm/malidp_regs.h
++++ b/drivers/gpu/drm/arm/malidp_regs.h
+@@ -210,6 +210,16 @@
+ #define MALIDP500_CONFIG_VALID		0x00f00
+ #define MALIDP500_CONFIG_ID		0x00fd4
+ 
++/*
++ * The quality of service (QoS) register on the DP500. RQOS register values
++ * are driven by the ARQOS signal, using AXI transacations, dependent on the
++ * FIFO input level.
++ * The RQOS register can also set QoS levels for:
++ *    - RED_ARQOS   @ A 4-bit signal value for close to underflow conditions
++ *    - GREEN_ARQOS @ A 4-bit signal value for normal conditions
++ */
++#define MALIDP500_RQOS_QUALITY          0x00500
++
+ /* register offsets and bits specific to DP550/DP650 */
+ #define MALIDP550_ADDR_SPACE_SIZE	0x10000
+ #define MALIDP550_DE_CONTROL		0x00010