layerscape: add patches-5.4

Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release
which was tagged LSDK-20.04-V5.4.
https://source.codeaurora.org/external/qoriq/qoriq-components/linux/

For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in
LSDK, port the dts patches from 4.14.

The patches are sorted into the following categories:
  301-arch-xxxx
  302-dts-xxxx
  303-core-xxxx
  701-net-xxxx
  801-audio-xxxx
  802-can-xxxx
  803-clock-xxxx
  804-crypto-xxxx
  805-display-xxxx
  806-dma-xxxx
  807-gpio-xxxx
  808-i2c-xxxx
  809-jailhouse-xxxx
  810-keys-xxxx
  811-kvm-xxxx
  812-pcie-xxxx
  813-pm-xxxx
  814-qe-xxxx
  815-sata-xxxx
  816-sdhc-xxxx
  817-spi-xxxx
  818-thermal-xxxx
  819-uart-xxxx
  820-usb-xxxx
  821-vfio-xxxx

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>

1 files changed, 242 insertions, 0 deletions

diff --git a/target/linux/layerscape/patches-5.4/302-dts-0038-arm64-dts-ls1012a-use-phy-handle-to-handle-phy-param.patch b/target/linux/layerscape/patches-5.4/302-dts-0038-arm64-dts-ls1012a-use-phy-handle-to-handle-phy-param.patch
new file mode 100644
index 0000000000..f6e7bf0b9c
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/302-dts-0038-arm64-dts-ls1012a-use-phy-handle-to-handle-phy-param.patch
@@ -0,0 +1,242 @@
+From 203a34f815c7e9320140bb2259ae5884575f0658 Mon Sep 17 00:00:00 2001
+From: Calvin Johnson <calvin.johnson@nxp.com>
+Date: Tue, 20 Nov 2018 21:52:03 +0530
+Subject: [PATCH] arm64: dts: ls1012a: use phy-handle to handle phy params
+
+Replace properties "fsl,gemac-phy-id" and "fsl,pfe-phy-if-flags"
+and use phy-handle instead.
+Create mdio node with phy-handles defining PHYs available on the
+mdio bus.
+
+Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
+---
+ .../boot/dts/freescale/fsl-ls1012a-2g5rdb.dts      | 25 +++++++++++++---------
+ arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 23 +++++++++++---------
+ arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts | 23 +++++++++++---------
+ arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts  | 25 +++++++++++++---------
+ arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts  | 22 ++++++++++---------
+ 5 files changed, 68 insertions(+), 50 deletions(-)
+
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
+@@ -58,14 +58,9 @@
+ 		#size-cells = <0>;
+ 		reg = <0x0>;	/* GEM_ID */
+ 		fsl,gemac-bus-id = <0x0>;	/* BUS_ID */
+-		fsl,gemac-phy-id = <0x1>;	/* PHY_ID */
+ 		fsl,mdio-mux-val = <0x0>;
+ 		phy-mode = "sgmii-2500";
+-		fsl,pfe-phy-if-flags = <0x0>;
+-
+-		mdio@0 {
+-			reg = <0x1>; /* enabled/disabled */
+-		};
++		phy-handle = <&sgmii_phy1>;
+ 	};
+ 
+ 	ethernet@1 {
+@@ -74,13 +69,23 @@
+ 		#size-cells = <0>;
+ 		reg = <0x1>;	/* GEM_ID */
+ 		fsl,gemac-bus-id = < 0x0>;	/* BUS_ID */
+-		fsl,gemac-phy-id = < 0x2>;	/* PHY_ID */
+ 		fsl,mdio-mux-val = <0x0>;
+ 		phy-mode = "sgmii-2500";
+-		fsl,pfe-phy-if-flags = <0x0>;
++		phy-handle = <&sgmii_phy2>;
++	};
++
++	mdio@0 {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		sgmii_phy1: ethernet-phy@1 {
++			compatible = "ethernet-phy-ieee802.3-c45";
++			reg = <0x1>;
++		};
+ 
+-		mdio@0 {
+-			reg = <0x0>; /* enabled/disabled */
++		sgmii_phy2: ethernet-phy@2 {
++			compatible = "ethernet-phy-ieee802.3-c45";
++			reg = <0x2>;
+ 		};
+ 	};
+ };
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
+@@ -90,14 +90,9 @@
+ 		#size-cells = <0>;
+ 		reg = <0x0>;	/* GEM_ID */
+ 		fsl,gemac-bus-id = <0x0>;	/* BUS_ID */
+-		fsl,gemac-phy-id = <0x2>;	/* PHY_ID */
+ 		fsl,mdio-mux-val = <0x0>;
+ 		phy-mode = "sgmii";
+-		fsl,pfe-phy-if-flags = <0x0>;
+-
+-		mdio@0 {
+-			reg = <0x1>; /* enabled/disabled */
+-		};
++		phy-handle = <&sgmii_phy1>;
+ 	};
+ 
+ 	ethernet@1 {
+@@ -106,13 +101,21 @@
+ 		#size-cells = <0>;
+ 		reg = <0x1>;	/* GEM_ID */
+ 		fsl,gemac-bus-id = <0x1>;	/* BUS_ID */
+-		fsl,gemac-phy-id = <0x1>;	/* PHY_ID */
+ 		fsl,mdio-mux-val = <0x0>;
+ 		phy-mode = "sgmii";
+-		fsl,pfe-phy-if-flags = <0x0>;
++		phy-handle = <&sgmii_phy2>;
++	};
++
++	mdio@0 {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		sgmii_phy1: ethernet-phy@2 {
++			reg = <0x2>;
++		};
+ 
+-		mdio@0 {
+-			reg = <0x0>; /* enabled/disabled */
++		sgmii_phy2: ethernet-phy@1 {
++			reg = <0x1>;
+ 		};
+ 	};
+ };
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
+@@ -111,14 +111,9 @@
+ 		#size-cells = <0>;
+ 		reg = <0x0>;	/* GEM_ID */
+ 		fsl,gemac-bus-id = <0x0>;	/* BUS_ID */
+-		fsl,gemac-phy-id = <0x2>;	/* PHY_ID */
+ 		fsl,mdio-mux-val = <0x0>;
+ 		phy-mode = "sgmii";
+-		fsl,pfe-phy-if-flags = <0x0>;
+-
+-		mdio@0 {
+-			reg = <0x1>; /* enabled/disabled */
+-		};
++		phy-handle = <&sgmii_phy1>;
+ 	};
+ 
+ 	ethernet@1 {
+@@ -127,13 +122,21 @@
+ 		#size-cells = <0>;
+ 		reg = <0x1>;	/* GEM_ID */
+ 		fsl,gemac-bus-id = <0x1>;	/* BUS_ID */
+-		fsl,gemac-phy-id = <0x1>;	/* PHY_ID */
+ 		fsl,mdio-mux-val = <0x0>;
+ 		phy-mode = "sgmii";
+-		fsl,pfe-phy-if-flags = <0x0>;
++		phy-handle = <&sgmii_phy2>;
++	};
++
++	mdio@0 {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		sgmii_phy1: ethernet-phy@2 {
++			reg = <0x2>;
++		};
+ 
+-		mdio@0 {
+-			reg = <0x0>; /* enabled/disabled */
++		sgmii_phy2: ethernet-phy@1 {
++			reg = <0x1>;
+ 		};
+ 	};
+ };
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
+@@ -148,14 +148,9 @@
+ 		#size-cells = <0>;
+ 		reg = <0x0>;	/* GEM_ID */
+ 		fsl,gemac-bus-id = <0x0>;	/* BUS_ID */
+-		fsl,gemac-phy-id = <0x1>;	/* PHY_ID */
+ 		fsl,mdio-mux-val = <0x2>;
+ 		phy-mode = "sgmii-2500";
+-		fsl,pfe-phy-if-flags = <0x0>;
+-
+-		mdio@0 {
+-			reg = <0x1>; /* enabled/disabled */
+-		};
++		phy-handle = <&sgmii_phy1>;
+ 	};
+ 
+ 	ethernet@1 {
+@@ -164,13 +159,23 @@
+ 		#size-cells = <0>;
+ 		reg = <0x1>;	/* GEM_ID */
+ 		fsl,gemac-bus-id = <0x1>;	/* BUS_ID */
+-		fsl,gemac-phy-id = <0x2>;	/* PHY_ID */
+ 		fsl,mdio-mux-val = <0x3>;
+ 		phy-mode = "sgmii-2500";
+-		fsl,pfe-phy-if-flags = <0x0>;
++		phy-handle = <&sgmii_phy2>;
++	};
++
++	mdio@0 {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		sgmii_phy1: ethernet-phy@1 {
++			compatible = "ethernet-phy-ieee802.3-c45";
++			reg = <0x1>;
++		};
+ 
+-		mdio@0 {
+-			reg = <0x0>; /* enabled/disabled */
++		sgmii_phy2: ethernet-phy@2 {
++			compatible = "ethernet-phy-ieee802.3-c45";
++			reg = <0x2>;
+ 		};
+ 	};
+ };
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
+@@ -59,14 +59,9 @@
+ 		#size-cells = <0>;
+ 		reg = <0x0>;	/* GEM_ID */
+ 		fsl,gemac-bus-id = <0x0>;	/* BUS_ID */
+-		fsl,gemac-phy-id = <0x2>;	/* PHY_ID */
+ 		fsl,mdio-mux-val = <0x0>;
+ 		phy-mode = "sgmii";
+-		fsl,pfe-phy-if-flags = <0x0>;
+-
+-		mdio@0 {
+-			reg = <0x1>; /* enabled/disabled */
+-		};
++		phy-handle = <&sgmii_phy>;
+ 	};
+ 
+ 	ethernet@1 {
+@@ -75,13 +70,20 @@
+ 		#size-cells = <0>;
+ 		reg = <0x1>;	/* GEM_ID */
+ 		fsl,gemac-bus-id = < 0x1 >;	/* BUS_ID */
+-		fsl,gemac-phy-id = < 0x1 >;	/* PHY_ID */
+ 		fsl,mdio-mux-val = <0x0>;
+ 		phy-mode = "rgmii-txid";
+-		fsl,pfe-phy-if-flags = <0x0>;
++		phy-handle = <&rgmii_phy>;
++	};
++	mdio@0 {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		sgmii_phy: ethernet-phy@2 {
++			reg = <0x2>;
++		};
+ 
+-		mdio@0 {
+-			reg = <0x0>; /* enabled/disabled */
++		rgmii_phy: ethernet-phy@1 {
++			reg = <0x1>;
+ 		};
+ 	};
+ };