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author | John Crispin <john@openwrt.org> | 2013-09-17 21:46:10 +0000 |
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committer | John Crispin <john@openwrt.org> | 2013-09-17 21:46:10 +0000 |
commit | 1878a3d6ab7e4296671eaa827623cc874d1f12c5 (patch) | |
tree | 895fea96a0462bc19622aed65e9e179d22d61069 /target/linux/lantiq/patches-3.10/0011-MIPS-lantiq-add-reset-controller-api-support.patch | |
parent | cd668944ef699762d4269ad71263ffe99c93ea8c (diff) | |
download | upstream-1878a3d6ab7e4296671eaa827623cc874d1f12c5.tar.gz upstream-1878a3d6ab7e4296671eaa827623cc874d1f12c5.tar.bz2 upstream-1878a3d6ab7e4296671eaa827623cc874d1f12c5.zip |
lantiq: add v3.10 patches
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 38031
Diffstat (limited to 'target/linux/lantiq/patches-3.10/0011-MIPS-lantiq-add-reset-controller-api-support.patch')
-rw-r--r-- | target/linux/lantiq/patches-3.10/0011-MIPS-lantiq-add-reset-controller-api-support.patch | 95 |
1 files changed, 95 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-3.10/0011-MIPS-lantiq-add-reset-controller-api-support.patch b/target/linux/lantiq/patches-3.10/0011-MIPS-lantiq-add-reset-controller-api-support.patch new file mode 100644 index 0000000000..f5c1b6e893 --- /dev/null +++ b/target/linux/lantiq/patches-3.10/0011-MIPS-lantiq-add-reset-controller-api-support.patch @@ -0,0 +1,95 @@ +From ab066a50a4aa00a862f467579960e8d12693df18 Mon Sep 17 00:00:00 2001 +From: John Crispin <blogic@openwrt.org> +Date: Tue, 3 Sep 2013 13:18:12 +0200 +Subject: [PATCH 11/34] MIPS: lantiq: add reset-controller api support + +Add a reset-controller binding for the reset registers found on the lantiq +SoC. + +Signed-off-by: John Crispin <blogic@openwrt.org> +--- + arch/mips/lantiq/xway/reset.c | 61 +++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 61 insertions(+) + +diff --git a/arch/mips/lantiq/xway/reset.c b/arch/mips/lantiq/xway/reset.c +index 1fa0f17..a1e06b7 100644 +--- a/arch/mips/lantiq/xway/reset.c ++++ b/arch/mips/lantiq/xway/reset.c +@@ -14,6 +14,7 @@ + #include <linux/delay.h> + #include <linux/of_address.h> + #include <linux/of_platform.h> ++#include <linux/reset-controller.h> + + #include <asm/reboot.h> + +@@ -113,6 +114,66 @@ void ltq_reset_once(unsigned int module, ulong u) + ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) & ~module, RCU_RST_REQ); + } + ++static int ltq_assert_device(struct reset_controller_dev *rcdev, ++ unsigned long id) ++{ ++ u32 val; ++ ++ if (id < 8) ++ return -1; ++ ++ val = ltq_rcu_r32(RCU_RST_REQ); ++ val |= BIT(id); ++ ltq_rcu_w32(val, RCU_RST_REQ); ++ ++ return 0; ++} ++ ++static int ltq_deassert_device(struct reset_controller_dev *rcdev, ++ unsigned long id) ++{ ++ u32 val; ++ ++ if (id < 8) ++ return -1; ++ ++ val = ltq_rcu_r32(RCU_RST_REQ); ++ val &= ~BIT(id); ++ ltq_rcu_w32(val, RCU_RST_REQ); ++ ++ return 0; ++} ++ ++static int ltq_reset_device(struct reset_controller_dev *rcdev, ++ unsigned long id) ++{ ++ ltq_assert_device(rcdev, id); ++ return ltq_deassert_device(rcdev, id); ++} ++ ++static struct reset_control_ops reset_ops = { ++ .reset = ltq_reset_device, ++ .assert = ltq_assert_device, ++ .deassert = ltq_deassert_device, ++}; ++ ++static struct reset_controller_dev reset_dev = { ++ .ops = &reset_ops, ++ .owner = THIS_MODULE, ++ .nr_resets = 32, ++ .of_reset_n_cells = 1, ++}; ++ ++void ltq_rst_init(void) ++{ ++ reset_dev.of_node = of_find_compatible_node(NULL, NULL, ++ "lantiq,xway-reset"); ++ if (!reset_dev.of_node) ++ pr_err("Failed to find reset controller node"); ++ else ++ reset_controller_register(&reset_dev); ++} ++ + static void ltq_machine_restart(char *command) + { + local_irq_disable(); +-- +1.7.10.4 + |