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author | Luka Perkov <luka@openwrt.org> | 2015-04-11 10:28:00 +0000 |
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committer | Luka Perkov <luka@openwrt.org> | 2015-04-11 10:28:00 +0000 |
commit | d21b92af8e17eaf1666baaf14e4d202c6381425d (patch) | |
tree | 16b6d5c1c334018d6dc194e7af00e73fdf38223a /target/linux/imx6/patches-3.14/0004-ARM-dts-imx6dl-enable-cpufreq-support.patch | |
parent | 912a6371f8a929cf3d96b32a8d5c3eac2eadac28 (diff) | |
download | upstream-d21b92af8e17eaf1666baaf14e4d202c6381425d.tar.gz upstream-d21b92af8e17eaf1666baaf14e4d202c6381425d.tar.bz2 upstream-d21b92af8e17eaf1666baaf14e4d202c6381425d.zip |
imx6: drop 3.14
Signed-off-by: Luka Perkov <luka@openwrt.org>
SVN-Revision: 45371
Diffstat (limited to 'target/linux/imx6/patches-3.14/0004-ARM-dts-imx6dl-enable-cpufreq-support.patch')
-rw-r--r-- | target/linux/imx6/patches-3.14/0004-ARM-dts-imx6dl-enable-cpufreq-support.patch | 42 |
1 files changed, 0 insertions, 42 deletions
diff --git a/target/linux/imx6/patches-3.14/0004-ARM-dts-imx6dl-enable-cpufreq-support.patch b/target/linux/imx6/patches-3.14/0004-ARM-dts-imx6dl-enable-cpufreq-support.patch deleted file mode 100644 index 6f07cdd277..0000000000 --- a/target/linux/imx6/patches-3.14/0004-ARM-dts-imx6dl-enable-cpufreq-support.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 978ed904c17cd39700a5e1f95ee29ef4fee08ce9 Mon Sep 17 00:00:00 2001 -From: Anson Huang <b20788@freescale.com> -Date: Thu, 19 Dec 2013 10:02:10 -0500 -Subject: [PATCH] ARM: dts: imx6dl: enable cpufreq support - -This patch adds cpufreq dts for i.mx6dl to support cpufreq driver. - -Signed-off-by: Anson Huang <b20788@freescale.com> -Signed-off-by: Shawn Guo <shawn.guo@linaro.org> ---- - arch/arm/boot/dts/imx6dl.dtsi | 20 ++++++++++++++++++++ - 1 file changed, 20 insertions(+) - ---- a/arch/arm/boot/dts/imx6dl.dtsi -+++ b/arch/arm/boot/dts/imx6dl.dtsi -@@ -21,6 +21,26 @@ - device_type = "cpu"; - reg = <0>; - next-level-cache = <&L2>; -+ operating-points = < -+ /* kHz uV */ -+ 996000 1275000 -+ 792000 1175000 -+ 396000 1075000 -+ >; -+ fsl,soc-operating-points = < -+ /* ARM kHz SOC-PU uV */ -+ 996000 1175000 -+ 792000 1175000 -+ 396000 1175000 -+ >; -+ clock-latency = <61036>; /* two CLK32 periods */ -+ clocks = <&clks 104>, <&clks 6>, <&clks 16>, -+ <&clks 17>, <&clks 170>; -+ clock-names = "arm", "pll2_pfd2_396m", "step", -+ "pll1_sw", "pll1_sys"; -+ arm-supply = <®_arm>; -+ pu-supply = <®_pu>; -+ soc-supply = <®_soc>; - }; - - cpu@1 { |