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| author | Gabor Juhos <juhosg@openwrt.org> | 2013-09-13 16:39:33 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2013-09-13 16:39:33 +0000 |
| commit | 24215346125214b18e1c85e56075884d813c39d9 (patch) | |
| tree | b7f86ed54fc97d7e8eadec45a9297063e020a050 /target/linux/cns21xx/patches-3.10/101-cns21xx-serial-support.patch | |
| parent | 6c14f5f3a60e017f101d792d94941f061b9c43f2 (diff) | |
| download | upstream-24215346125214b18e1c85e56075884d813c39d9.tar.gz upstream-24215346125214b18e1c85e56075884d813c39d9.tar.bz2 upstream-24215346125214b18e1c85e56075884d813c39d9.zip | |
cns21xx: add support for 3.10
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 37971
Diffstat (limited to 'target/linux/cns21xx/patches-3.10/101-cns21xx-serial-support.patch')
| -rw-r--r-- | target/linux/cns21xx/patches-3.10/101-cns21xx-serial-support.patch | 103 |
1 files changed, 103 insertions, 0 deletions
diff --git a/target/linux/cns21xx/patches-3.10/101-cns21xx-serial-support.patch b/target/linux/cns21xx/patches-3.10/101-cns21xx-serial-support.patch new file mode 100644 index 0000000000..029059a951 --- /dev/null +++ b/target/linux/cns21xx/patches-3.10/101-cns21xx-serial-support.patch @@ -0,0 +1,103 @@ +--- a/arch/arm/mach-cns21xx/common.h ++++ b/arch/arm/mach-cns21xx/common.h +@@ -17,4 +17,7 @@ void cns21xx_timer_init(void); + + extern struct sys_timer cns21xx_timer; + ++int cns21xx_register_uart0(void); ++int cns21xx_register_uart1(void); ++ + #endif /* _MACH_CNS21XX_COMMON_H */ +--- /dev/null ++++ b/arch/arm/mach-cns21xx/devices.c +@@ -0,0 +1,79 @@ ++/* ++ * Copyright (c) 2008 Cavium Networks ++ * Copyright (c) 2010-2012 Gabor Juhos <juhosg@openwrt.org> ++ * ++ * This file is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License, Version 2, as ++ * published by the Free Software Foundation. ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/init.h> ++#include <linux/platform_device.h> ++#include <linux/serial_8250.h> ++ ++#include <mach/irqs.h> ++#include <mach/hardware.h> ++#include <mach/cns21xx.h> ++#include <mach/cns21xx_misc.h> ++ ++#define CNS21XX_UART_CLOCK 24000000 ++ ++#define CNS21XX_UART_FLAGS (UPF_SKIP_TEST | UPF_FIXED_TYPE | UPF_NO_TXEN_TEST) ++ ++static struct plat_serial8250_port cns21xx_uart0_data[] = { ++ { ++ .mapbase = CNS21XX_UART0_BASE, ++ .membase = (void *) CNS21XX_UART0_BASE_VIRT, ++ .irq = CNS21XX_IRQ_UART0, ++ .uartclk = CNS21XX_UART_CLOCK, ++ .regshift = 2, ++ .iotype = UPIO_MEM, ++ .type = PORT_16550A, ++ .flags = CNS21XX_UART_FLAGS, ++ }, { ++ /* terminating entry */ ++ }, ++}; ++ ++static struct platform_device cns21xx_uart0_device = { ++ .name = "serial8250", ++ .id = PLAT8250_DEV_PLATFORM, ++ .dev = { ++ .platform_data = cns21xx_uart0_data, ++ }, ++}; ++ ++int __init cns21xx_register_uart0(void) ++{ ++ return platform_device_register(&cns21xx_uart0_device); ++} ++ ++static struct plat_serial8250_port cns21xx_uart1_data[] = { ++ { ++ .mapbase = CNS21XX_UART1_BASE, ++ .membase = (void *) CNS21XX_UART1_BASE_VIRT, ++ .irq = CNS21XX_IRQ_UART1, ++ .uartclk = CNS21XX_UART_CLOCK, ++ .regshift = 2, ++ .iotype = UPIO_MEM, ++ .type = PORT_16550A, ++ .flags = CNS21XX_UART_FLAGS, ++ }, { ++ /* terminating entry */ ++ }, ++}; ++ ++static struct platform_device cns21xx_uart1_device = { ++ .name = "serial8250", ++ .id = PLAT8250_DEV_PLATFORM1, ++ .dev = { ++ .platform_data = cns21xx_uart1_data, ++ }, ++}; ++ ++int __init cns21xx_register_uart1(void) ++{ ++ HAL_MISC_ENABLE_UART1_PINS(); ++ return platform_device_register(&cns21xx_uart1_device); ++} +--- a/arch/arm/mach-cns21xx/Makefile ++++ b/arch/arm/mach-cns21xx/Makefile +@@ -4,7 +4,7 @@ + + # Object file lists. + +-obj-y := core.o irq.o mm.o time.o idle.o ++obj-y := core.o irq.o mm.o time.o idle.o devices.o + + # machine specific files + |