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| author | Florian Fainelli <florian@openwrt.org> | 2013-05-01 21:12:26 +0000 |
|---|---|---|
| committer | Florian Fainelli <florian@openwrt.org> | 2013-05-01 21:12:26 +0000 |
| commit | 6f48ccea0279423b68c47488d090b45105afe740 (patch) | |
| tree | 0cdd37304fd9989816e0dcf3c75c9911f6c8edc9 /target/linux/brcm63xx/patches-3.7/030-MIPS-BCM63XX-Fix-BCM6345-clock-bits.patch | |
| parent | 292493f74dfc3a87daf7d9d49ac9623df1c7181a (diff) | |
| download | upstream-6f48ccea0279423b68c47488d090b45105afe740.tar.gz upstream-6f48ccea0279423b68c47488d090b45105afe740.tar.bz2 upstream-6f48ccea0279423b68c47488d090b45105afe740.zip | |
brcm63xx: remove 3.7 kernel support
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 36504
Diffstat (limited to 'target/linux/brcm63xx/patches-3.7/030-MIPS-BCM63XX-Fix-BCM6345-clock-bits.patch')
| -rw-r--r-- | target/linux/brcm63xx/patches-3.7/030-MIPS-BCM63XX-Fix-BCM6345-clock-bits.patch | 35 |
1 files changed, 0 insertions, 35 deletions
diff --git a/target/linux/brcm63xx/patches-3.7/030-MIPS-BCM63XX-Fix-BCM6345-clock-bits.patch b/target/linux/brcm63xx/patches-3.7/030-MIPS-BCM63XX-Fix-BCM6345-clock-bits.patch deleted file mode 100644 index d18633a475..0000000000 --- a/target/linux/brcm63xx/patches-3.7/030-MIPS-BCM63XX-Fix-BCM6345-clock-bits.patch +++ /dev/null @@ -1,35 +0,0 @@ -From: Florian Fainelli <florian@openwrt.org> -Subject: [PATCH] MIPS: BCM63XX: fix BCM6345 clock bits shifting - -BCM6345 has an intermediate 16-bits wide test control register between the -peripheral identifier function, and its clock control register is only 16-bits -wide contrary to other platforms where it is 32-bits wide. By shifting all -clocks bits by 16-bits to the left we ensure they get written to the proper -clock control register, without adding specific BCM6345 handling in the clock -code. - -Signed-off-by: Florian Fainelli <florian@openwrt.org> ---- ---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -@@ -53,13 +53,13 @@ - CKCTL_6338_SAR_EN | \ - CKCTL_6338_SPI_EN) - --#define CKCTL_6345_CPU_EN (1 << 0) --#define CKCTL_6345_BUS_EN (1 << 1) --#define CKCTL_6345_EBI_EN (1 << 2) --#define CKCTL_6345_UART_EN (1 << 3) --#define CKCTL_6345_ADSLPHY_EN (1 << 4) --#define CKCTL_6345_ENET_EN (1 << 7) --#define CKCTL_6345_USBH_EN (1 << 8) -+#define CKCTL_6345_CPU_EN (1 << 16) -+#define CKCTL_6345_BUS_EN (1 << 17) -+#define CKCTL_6345_EBI_EN (1 << 18) -+#define CKCTL_6345_UART_EN (1 << 19) -+#define CKCTL_6345_ADSLPHY_EN (1 << 20) -+#define CKCTL_6345_ENET_EN (1 << 23) -+#define CKCTL_6345_USBH_EN (1 << 24) - - #define CKCTL_6345_ALL_SAFE_EN (CKCTL_6345_ENET_EN | \ - CKCTL_6345_USBH_EN | \ |