bcm63xx: add preliminary support for bcm6328

SVN-Revision: 31878

1 files changed, 47 insertions, 0 deletions

diff --git a/target/linux/brcm63xx/patches-3.3/310-MIPS-BCM63XX-use-the-Chip-ID-register-for-identifyin.patch b/target/linux/brcm63xx/patches-3.3/310-MIPS-BCM63XX-use-the-Chip-ID-register-for-identifyin.patch
new file mode 100644
index 0000000000..30adbd1985
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.3/310-MIPS-BCM63XX-use-the-Chip-ID-register-for-identifyin.patch
@@ -0,0 +1,47 @@
+From d831de57b1995eff51f43310b4bbfa85b1a3df42 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 30 Dec 2011 02:37:47 +0100
+Subject: [PATCH 38/79] MIPS: BCM63XX: use the Chip ID register for
+ identifying the SoC
+
+Newer BCM63XX SoCs use virtually the same cpu ID. But since they all have
+the Chip ID register at the same location, we can use that to identify
+the SoC we are running on.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ arch/mips/bcm63xx/cpu.c |   20 ++++++++++++--------
+ 1 file changed, 12 insertions(+), 8 deletions(-)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -228,17 +228,21 @@ void __init bcm63xx_cpu_init(void)
+ 		bcm63xx_irqs = bcm6345_irqs;
+ 		break;
+ 	case CPU_BMIPS4350:
+-		switch (read_c0_prid() & 0xf0) {
+-		case 0x10:
++		if ((read_c0_prid() & 0xf0) == 0x10) {
+ 			expected_cpu_id = BCM6358_CPU_ID;
+ 			bcm63xx_regs_base = bcm6358_regs_base;
+ 			bcm63xx_irqs = bcm6358_irqs;
+-			break;
+-		case 0x30:
+-			expected_cpu_id = BCM6368_CPU_ID;
+-			bcm63xx_regs_base = bcm6368_regs_base;
+-			bcm63xx_irqs = bcm6368_irqs;
+-			break;
++		} else {
++			/* all newer chips have the same chip id location */
++			u16 chip_id = bcm_readw(BCM_6368_PERF_BASE);
++
++			switch (chip_id) {
++			case BCM6368_CPU_ID:
++				expected_cpu_id = BCM6368_CPU_ID;
++				bcm63xx_regs_base = bcm6368_regs_base;
++				bcm63xx_irqs = bcm6368_irqs;
++				break;
++			}
+ 		}
+ 		break;
+ 	}