aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/brcm63xx/patches-3.3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch
diff options
context:
space:
mode:
authorFlorian Fainelli <florian@openwrt.org>2012-06-17 16:17:29 +0000
committerFlorian Fainelli <florian@openwrt.org>2012-06-17 16:17:29 +0000
commitb89c81929e462e66e953dddd91429be49c69e439 (patch)
treed28b9c6f06ca13f0fa3de8ff61328a3062bca55b /target/linux/brcm63xx/patches-3.3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch
parent89701ec518741ab8a550eeb48e9d840abcab0dbb (diff)
downloadupstream-b89c81929e462e66e953dddd91429be49c69e439.tar.gz
upstream-b89c81929e462e66e953dddd91429be49c69e439.tar.bz2
upstream-b89c81929e462e66e953dddd91429be49c69e439.zip
fix SPI message control handling for BCM6338/6348
BCM6338 and BCM6338 have their MSG_CONTROL register width of 8-bits instead of 16-bits. We were previously using a 16-bits write which corrupted the first byte of the TX FIFO. Also the message type was always set to Full-duplex even in the case of half-duplex messages. SVN-Revision: 32409
Diffstat (limited to 'target/linux/brcm63xx/patches-3.3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch')
-rw-r--r--target/linux/brcm63xx/patches-3.3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/brcm63xx/patches-3.3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch b/target/linux/brcm63xx/patches-3.3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch
index 5c77585ed7..a656de6c77 100644
--- a/target/linux/brcm63xx/patches-3.3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch
+++ b/target/linux/brcm63xx/patches-3.3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch
@@ -85,7 +85,7 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org>
static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -1092,4 +1092,18 @@
+@@ -1099,4 +1099,18 @@
#define SPI_SSOFFTIME_SHIFT 3
#define SPI_BYTE_SWAP 0x80