brcm63xx: remove non runtime detect and refresh affinity patches

Remove the non runtime detect code since its effectiveness is dubious
and almost never used.
Also update affinity patches to work on top of it.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>

SVN-Revision: 39268

1 files changed, 0 insertions, 80 deletions

diff --git a/target/linux/brcm63xx/patches-3.10/317-MIPS-BCM63XX-use-a-helper-for-getting-the-right-regi.patch b/target/linux/brcm63xx/patches-3.10/317-MIPS-BCM63XX-use-a-helper-for-getting-the-right-regi.patch
deleted file mode 100644
index e3377313f6..0000000000
--- a/target/linux/brcm63xx/patches-3.10/317-MIPS-BCM63XX-use-a-helper-for-getting-the-right-regi.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 353f07637d82cf485a9319d203a6ed9b38590526 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 25 Apr 2013 15:35:12 +0200
-Subject: [PATCH 09/14] MIPS: BCM63XX: use a helper for getting the right
- register address
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/irq.c |   30 ++++++++++++++++++++++++------
- 1 file changed, 24 insertions(+), 6 deletions(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -284,6 +284,20 @@ static inline u32 get_ext_irq_perf_reg(i
- 	return ext_irq_cfg_reg2;
- }
- 
-+static inline u32 get_irq_stat_addr(int pin)
-+{
-+	if (pin == 0)
-+		return irq_stat_addr0;
-+	return irq_stat_addr1;
-+}
-+
-+static inline u32 get_irq_mask_addr(int pin)
-+{
-+	if (pin == 0)
-+		return irq_mask_addr0;
-+	return irq_mask_addr1;
-+}
-+
- static inline void handle_internal(int intbit)
- {
- 	if (is_ext_irq_cascaded &&
-@@ -307,13 +321,15 @@ void __dispatch_internal_##width(void)
- 	unsigned int src, tgt;						\
- 	bool irqs_pending = false;					\
- 	static int i;							\
-+	u32 irq_stat_addr = get_irq_stat_addr(0);			\
-+	u32 irq_mask_addr = get_irq_mask_addr(0);			\
- 									\
- 	/* read registers in reverse order */				\
- 	for (src = 0, tgt = (width / 32); src < (width / 32); src++) {	\
- 		u32 val;						\
- 									\
--		val = bcm_readl(irq_stat_addr0 + src * sizeof(u32));	\
--		val &= bcm_readl(irq_mask_addr0 + src * sizeof(u32));	\
-+		val = bcm_readl(irq_stat_addr + src * sizeof(u32));	\
-+		val &= bcm_readl(irq_mask_addr + src * sizeof(u32));	\
- 		pending[--tgt] = val;					\
- 									\
- 		if (val)						\
-@@ -339,10 +355,11 @@ static void __internal_irq_mask_##width(
- 	u32 val;							\
- 	unsigned reg = (irq / 32) ^ (width/32 - 1);			\
- 	unsigned bit = irq & 0x1f;					\
-+	u32 irq_mask_addr = get_irq_mask_addr(0);			\
- 									\
--	val = bcm_readl(irq_mask_addr0 + reg * sizeof(u32));		\
-+	val = bcm_readl(irq_mask_addr + reg * sizeof(u32));		\
- 	val &= ~(1 << bit);						\
--	bcm_writel(val, irq_mask_addr0 + reg * sizeof(u32));		\
-+	bcm_writel(val, irq_mask_addr + reg * sizeof(u32));		\
- }									\
- 									\
- static void __internal_irq_unmask_##width(unsigned int irq)		\
-@@ -350,10 +367,11 @@ static void __internal_irq_unmask_##widt
- 	u32 val;							\
- 	unsigned reg = (irq / 32) ^ (width/32 - 1);			\
- 	unsigned bit = irq & 0x1f; 					\
-+	u32 irq_mask_addr = get_irq_mask_addr(0);			\
- 									\
--	val = bcm_readl(irq_mask_addr0 + reg * sizeof(u32));		\
-+	val = bcm_readl(irq_mask_addr + reg * sizeof(u32));		\
- 	val |= (1 << bit); 						\
--	bcm_writel(val, irq_mask_addr0 + reg * sizeof(u32));		\
-+	bcm_writel(val, irq_mask_addr + reg * sizeof(u32));		\
- }
- 
- BUILD_IPIC_INTERNAL(32);