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| author | Peter Denison <openwrt@marshadder.org> | 2008-04-25 20:49:40 +0000 |
|---|---|---|
| committer | Peter Denison <openwrt@marshadder.org> | 2008-04-25 20:49:40 +0000 |
| commit | b6b6155ec81c704cd70157753b38f90fd506e708 (patch) | |
| tree | 0e3521dc9f267b5f130bb1ac1bcdae91c4be11cb /target/linux/brcm47xx/patches-2.6.25/250-ohci-ssb-usb2.patch | |
| parent | 5f13c4844e0784ff40c1d15f5077d945ebf17f9b (diff) | |
| download | upstream-b6b6155ec81c704cd70157753b38f90fd506e708.tar.gz upstream-b6b6155ec81c704cd70157753b38f90fd506e708.tar.bz2 upstream-b6b6155ec81c704cd70157753b38f90fd506e708.zip | |
First step to upgrade of brcm47xx to kernel version 2.6.25
SVN-Revision: 10939
Diffstat (limited to 'target/linux/brcm47xx/patches-2.6.25/250-ohci-ssb-usb2.patch')
| -rw-r--r-- | target/linux/brcm47xx/patches-2.6.25/250-ohci-ssb-usb2.patch | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/target/linux/brcm47xx/patches-2.6.25/250-ohci-ssb-usb2.patch b/target/linux/brcm47xx/patches-2.6.25/250-ohci-ssb-usb2.patch new file mode 100644 index 0000000000..45493958b2 --- /dev/null +++ b/target/linux/brcm47xx/patches-2.6.25/250-ohci-ssb-usb2.patch @@ -0,0 +1,72 @@ +--- a/drivers/usb/host/ohci-ssb.c 2007-11-05 07:56:56.000000000 -0800 ++++ b/drivers/usb/host/ohci-ssb.c 2007-11-05 08:26:15.000000000 -0800 +@@ -142,10 +142,59 @@ + int err = -ENOMEM; + u32 tmp, flags = 0; + +- if (dev->id.coreid == SSB_DEV_USB11_HOSTDEV) ++ /* ++ * THE FOLLOWING COMMENTS PRESERVED FROM GPL SOURCE RELEASE ++ * ++ * The USB core requires a special bit to be set during core ++ * reset to enable host (OHCI) mode. Resetting the SB core in ++ * pcibios_enable_device() is a hack for compatibility with ++ * vanilla usb-ohci so that it does not have to know about ++ * SB. A driver that wants to use the USB core in device mode ++ * should know about SB and should reset the bit back to 0 ++ * after calling pcibios_enable_device(). ++ */ ++ ++ if (dev->id.coreid == SSB_DEV_USB11_HOSTDEV) { + flags |= SSB_OHCI_TMSLOW_HOSTMODE; ++ ssb_device_enable(dev, flags); ++ } ++ ++ /* ++ * USB 2.0 special considerations: ++ * ++ * 1. Since the core supports both OHCI and EHCI functions, it must ++ * only be reset once. ++ * ++ * 2. In addition to the standard SB reset sequence, the Host Control ++ * Register must be programmed to bring the USB core and various ++ * phy components out of reset. ++ */ ++ ++ else if (dev->id.coreid == SSB_DEV_USB20_HOST) { ++#warning FIX ME need test for core being up & exit ++ ssb_device_enable(dev, 0); ++ ssb_write32(dev, 0x200, 0x7ff); ++ udelay(1); ++ if (dev->id.revision == 1) { // bug in rev 1 ++ ++ /* Change Flush control reg */ ++ tmp = ssb_read32(dev, 0x400); ++ tmp &= ~8; ++ ssb_write32(dev, 0x400, tmp); ++ tmp = ssb_read32(dev, 0x400); ++ printk("USB20H fcr: 0x%0x\n", tmp); ++ ++ /* Change Shim control reg */ ++ tmp = ssb_read32(dev, 0x304); ++ tmp &= ~0x100; ++ ssb_write32(dev, 0x304, tmp); ++ tmp = ssb_read32(dev, 0x304); ++ printk("USB20H shim: 0x%0x\n", tmp); ++ } ++ } ++ else ++ ssb_device_enable(dev, 0); + +- ssb_device_enable(dev, flags); + + hcd = usb_create_hcd(&ssb_ohci_hc_driver, dev->dev, + dev->dev->bus_id); +@@ -235,6 +284,7 @@ + static const struct ssb_device_id ssb_ohci_table[] = { + SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOSTDEV, SSB_ANY_REV), + SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOST, SSB_ANY_REV), ++ SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB20_HOST, SSB_ANY_REV), + SSB_DEVTABLE_END + }; + MODULE_DEVICE_TABLE(ssb, ssb_ohci_table); |