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author | Álvaro Fernández Rojas <noltari@gmail.com> | 2017-03-04 19:37:50 +0100 |
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committer | Álvaro Fernández Rojas <noltari@gmail.com> | 2017-03-04 19:37:50 +0100 |
commit | baad22eed3ea3242051bbde6ebf56e74deb11ea6 (patch) | |
tree | 2980f26a82772c37d7d655871780fad0f3a4aeb1 /target/linux/brcm2708/patches-4.9/0129-BCM270X_DT-Add-spi0-cs-overlay.patch | |
parent | f229f4af31731badc2dec27c9bdef9f5fa8f7433 (diff) | |
download | upstream-baad22eed3ea3242051bbde6ebf56e74deb11ea6.tar.gz upstream-baad22eed3ea3242051bbde6ebf56e74deb11ea6.tar.bz2 upstream-baad22eed3ea3242051bbde6ebf56e74deb11ea6.zip |
brcm2708: update linux 4.9 patches to latest version
As usual these patches were extracted and rebased from the raspberry pi repo:
https://github.com/raspberrypi/linux/tree/rpi-4.9.y
- Remove led1 from diag.sh for RPi3 since it causes boot issues.
- Fix modules.mk typos.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Diffstat (limited to 'target/linux/brcm2708/patches-4.9/0129-BCM270X_DT-Add-spi0-cs-overlay.patch')
-rw-r--r-- | target/linux/brcm2708/patches-4.9/0129-BCM270X_DT-Add-spi0-cs-overlay.patch | 83 |
1 files changed, 0 insertions, 83 deletions
diff --git a/target/linux/brcm2708/patches-4.9/0129-BCM270X_DT-Add-spi0-cs-overlay.patch b/target/linux/brcm2708/patches-4.9/0129-BCM270X_DT-Add-spi0-cs-overlay.patch deleted file mode 100644 index e90767a95a..0000000000 --- a/target/linux/brcm2708/patches-4.9/0129-BCM270X_DT-Add-spi0-cs-overlay.patch +++ /dev/null @@ -1,83 +0,0 @@ -From efdb964748f093780166ef56fa7873067d35074e Mon Sep 17 00:00:00 2001 -From: Phil Elwell <phil@raspberrypi.org> -Date: Mon, 16 Jan 2017 14:53:12 +0000 -Subject: [PATCH] BCM270X_DT: Add spi0-cs overlay - -The spi0-cs overlay allows the software chip selectts to be modified -using the cs0_pin and cs1_pin parameters. - -Signed-off-by: Phil Elwell <phil@raspberrypi.org> ---- - arch/arm/boot/dts/overlays/Makefile | 1 + - arch/arm/boot/dts/overlays/README | 9 +++++++- - arch/arm/boot/dts/overlays/spi0-cs-overlay.dts | 29 ++++++++++++++++++++++++++ - 3 files changed, 38 insertions(+), 1 deletion(-) - create mode 100644 arch/arm/boot/dts/overlays/spi0-cs-overlay.dts - ---- a/arch/arm/boot/dts/overlays/Makefile -+++ b/arch/arm/boot/dts/overlays/Makefile -@@ -83,6 +83,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ - smi-nand.dtbo \ - spi-gpio35-39.dtbo \ - spi-rtc.dtbo \ -+ spi0-cs.dtbo \ - spi0-hw-cs.dtbo \ - spi1-1cs.dtbo \ - spi1-2cs.dtbo \ ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -1138,7 +1138,7 @@ Params: <None> - - - Name: spi-gpio35-39 --Info: move SPI function block to GPIO 35 to 39 -+Info: Move SPI function block to GPIO 35 to 39 - Load: dtoverlay=spi-gpio35-39 - Params: <None> - -@@ -1149,6 +1149,13 @@ Load: dtoverlay=spi-rtc,<param>=<val> - Params: pcf2123 Select the PCF2123 device - - -+Name: spi0-cs -+Info: Allows the (software) CS pins for SPI0 to be changed -+Load: dtoverlay=spi0-cs,<param>=<val> -+Params: cs0_pin GPIO pin for CS0 (default 8) -+ cs1_pin GPIO pin for CS1 (default 7) -+ -+ - Name: spi0-hw-cs - Info: Re-enables hardware CS/CE (chip selects) for SPI0 - Load: dtoverlay=spi0-hw-cs ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/spi0-cs-overlay.dts -@@ -0,0 +1,29 @@ -+/dts-v1/; -+/plugin/; -+ -+ -+/ { -+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; -+ -+ fragment@0 { -+ target = <&spi0_cs_pins>; -+ frag0: __overlay__ { -+ brcm,pins = <8 7>; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&spi0>; -+ frag1: __overlay__ { -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ status = "okay"; -+ }; -+ }; -+ -+ __overrides__ { -+ cs0_pin = <&frag0>,"brcm,pins:0", -+ <&frag1>,"cs-gpios:4"; -+ cs1_pin = <&frag0>,"brcm,pins:4", -+ <&frag1>,"cs-gpios:16"; -+ }; -+}; |