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author | Rafał Miłecki <rafal@milecki.pl> | 2020-03-10 15:46:49 +0100 |
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committer | Rafał Miłecki <rafal@milecki.pl> | 2020-03-10 15:50:55 +0100 |
commit | d369d92fc7ed2970540235b27441f75a81ef171b (patch) | |
tree | 248c5980fda5e8631c4c7b58a2bf55756e475b1d /target/linux/bcm47xx/patches-5.4/900-ssb-reject-PCI-writes-setting-CardBus-bridge-resourc.patch | |
parent | 5c98041d5a054bfe68070bbfa6fdeab63e6586fc (diff) | |
download | upstream-d369d92fc7ed2970540235b27441f75a81ef171b.tar.gz upstream-d369d92fc7ed2970540235b27441f75a81ef171b.tar.bz2 upstream-d369d92fc7ed2970540235b27441f75a81ef171b.zip |
bcm47xx: add support for kernel 5.4
Ethernet, switch, LEDs, buttons, USB, sysupgrade & LuCI were
successfully tested on BCM4706.
WARNING: Hack for BCM4710 adding BCM4710_PROTECTED_FILL_TLB() to the
local_r4k_flush_cache_sigtramp() could not be ported. That function has
been dropped in:
commit adcc81f148d7 ("MIPS: math-emu: Write-protect delay slot emulation pages")
commit 3315b6b336c8 ("MIPS: Delete unused flush_cache_sigtramp()")
it's unsure if that chipset will still work reliably.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Diffstat (limited to 'target/linux/bcm47xx/patches-5.4/900-ssb-reject-PCI-writes-setting-CardBus-bridge-resourc.patch')
-rw-r--r-- | target/linux/bcm47xx/patches-5.4/900-ssb-reject-PCI-writes-setting-CardBus-bridge-resourc.patch | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/target/linux/bcm47xx/patches-5.4/900-ssb-reject-PCI-writes-setting-CardBus-bridge-resourc.patch b/target/linux/bcm47xx/patches-5.4/900-ssb-reject-PCI-writes-setting-CardBus-bridge-resourc.patch new file mode 100644 index 0000000000..6b7ee06e50 --- /dev/null +++ b/target/linux/bcm47xx/patches-5.4/900-ssb-reject-PCI-writes-setting-CardBus-bridge-resourc.patch @@ -0,0 +1,30 @@ +From 5c81397a0147ea59c778d1de14ef54e2268221f6 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> +Date: Wed, 8 Apr 2015 06:58:11 +0200 +Subject: [PATCH] ssb: reject PCI writes setting CardBus bridge resources +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +If SoC has a CardBus we can set resources of device at slot 1 only. It's +impossigle to set bridge resources as it simply overwrites device 1 +configuration and usually results in Data bus error-s. + +Signed-off-by: Rafał Miłecki <zajec5@gmail.com> +--- + drivers/ssb/driver_pcicore.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/ssb/driver_pcicore.c ++++ b/drivers/ssb/driver_pcicore.c +@@ -164,6 +164,10 @@ static int ssb_extpci_write_config(struc + WARN_ON(!pc->hostmode); + if (unlikely(len != 1 && len != 2 && len != 4)) + goto out; ++ /* CardBus SoCs allow configuring dev 1 resources only */ ++ if (extpci_core->cardbusmode && dev != 1 && ++ off >= PCI_BASE_ADDRESS_0 && off <= PCI_BASE_ADDRESS_5) ++ goto out; + addr = get_cfgspace_addr(pc, bus, dev, func, off); + if (unlikely(!addr)) + goto out; |