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authorJohn Crispin <john@phrozen.org>2018-05-06 10:20:11 +0200
committerJohn Crispin <john@phrozen.org>2018-05-07 08:06:51 +0200
commit53c474abbdfef8eb3499e2d10c9ad491788b8a72 (patch)
treeacd19415420664f59bc63c1ceb4ad37bb7323027 /target/linux/ath79/dts
parent3dc523f232ff01d31d59345f5fa6de508d5059ef (diff)
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ath79: add new OF only target for QCA MIPS silicon
This target aims to replace ar71xx mid-term. The big part that is still missing is making the MMIO/AHB wifi work using OF. NAND and mikrotik subtargets will follow. Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/ath79/dts')
-rw-r--r--target/linux/ath79/dts/Makefile13
-rw-r--r--target/linux/ath79/dts/ar7100.dtsi204
-rw-r--r--target/linux/ath79/dts/ar7161_netgear_wndr3800.dts186
-rw-r--r--target/linux/ath79/dts/ar7241.dtsi78
-rw-r--r--target/linux/ath79/dts/ar7241_ubnt-bullet-m.dts13
-rw-r--r--target/linux/ath79/dts/ar7241_ubnt-nano-m.dts9
-rw-r--r--target/linux/ath79/dts/ar7241_ubnt-rocket-m.dts21
-rw-r--r--target/linux/ath79/dts/ar7241_ubnt-unifi.dts135
-rw-r--r--target/linux/ath79/dts/ar7241_ubnt-xm.dts13
-rw-r--r--target/linux/ath79/dts/ar7241_ubnt-xm.dtsi146
-rw-r--r--target/linux/ath79/dts/ar7242.dtsi69
-rw-r--r--target/linux/ath79/dts/ar7242_buffalo_wzr-hp-g450h.dts127
-rw-r--r--target/linux/ath79/dts/ar724x.dtsi140
-rw-r--r--target/linux/ath79/dts/ar9132.dtsi171
-rw-r--r--target/linux/ath79/dts/ar9132_tl_wr1043nd_v1.dts113
-rw-r--r--target/linux/ath79/dts/ar9330.dtsi160
-rw-r--r--target/linux/ath79/dts/ar9330_gl_ar150.dts156
-rw-r--r--target/linux/ath79/dts/ar9331.dtsi6
-rw-r--r--target/linux/ath79/dts/ar9331_dpt_module.dts79
-rw-r--r--target/linux/ath79/dts/ar9331_dragino_ms14.dts103
-rw-r--r--target/linux/ath79/dts/ar9331_ew_dorin.dts124
-rw-r--r--target/linux/ath79/dts/ar9331_omega.dts79
-rw-r--r--target/linux/ath79/dts/ar9331_tl_mr3020.dts119
-rw-r--r--target/linux/ath79/dts/ath79.dtsi81
-rw-r--r--target/linux/ath79/dts/qca9557.dtsi201
-rw-r--r--target/linux/ath79/dts/qca9558_om5p_ac.dts170
26 files changed, 2716 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/Makefile b/target/linux/ath79/dts/Makefile
new file mode 100644
index 0000000000..eabd94eb59
--- /dev/null
+++ b/target/linux/ath79/dts/Makefile
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0
+# All DTBs
+dtb-$(CONFIG_ATH79) += ar9132_tl_wr1043nd_v1.dtb
+dtb-$(CONFIG_ATH79) += ar9331_dpt_module.dtb
+dtb-$(CONFIG_ATH79) += ar9331_dragino_ms14.dtb
+dtb-$(CONFIG_ATH79) += ar9331_omega.dtb
+dtb-$(CONFIG_ATH79) += ar9331_tl_mr3020.dtb
+
+# Force kbuild to make empty built-in.o if necessary
+obj- += dummy.o
+
+always := $(dtb-y)
+clean-files := *.dtb *.dtb.S
diff --git a/target/linux/ath79/dts/ar7100.dtsi b/target/linux/ath79/dts/ar7100.dtsi
new file mode 100644
index 0000000000..d4a973f505
--- /dev/null
+++ b/target/linux/ath79/dts/ar7100.dtsi
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/clock/ath79-clk.h>
+#include "ath79.dtsi"
+
+/ {
+ compatible = "qca,ar7100";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mips,mips24Kc";
+ clocks = <&pll ATH79_CLK_CPU>;
+ reg = <0>;
+ };
+ };
+
+ ahb {
+ apb {
+ ddr_ctrl: memory-controller@18000000 {
+ compatible = "qca,ar7100-ddr-controller";
+ reg = <0x18000000 0x100>;
+
+ #qca,ddr-wb-channel-cells = <1>;
+ };
+
+ uart: uart@18020000 {
+ compatible = "ns16550a";
+ reg = <0x18020000 0x20>;
+ interrupts = <3>;
+
+ clocks = <&pll ATH79_CLK_AHB>;
+ clock-names = "uart";
+
+ reg-io-width = <4>;
+ reg-shift = <2>;
+ no-loopback-test;
+
+ status = "disabled";
+ };
+
+ usb_phy: usb-phy@18030000 {
+ compatible = "qca,ar7100-usb-phy";
+ reg = <0x18030000 0x10>;
+
+ reset-names = "usb-phy", "usb-host", "usb-ohci-dll";
+ resets = <&rst 4>, <&rst 5>, <&rst 6>;
+
+ #phy-cells = <0>;
+
+ status = "disabled";
+ };
+
+ gpio: gpio@18040000 {
+ compatible = "qca,ar7100-gpio";
+ reg = <0x18040000 0x30>;
+ interrupts = <2>;
+
+ ngpios = <16>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pll: pll-controller@18050000 {
+ compatible = "qca,ar7100-pll", "syscon";
+ reg = <0x18050000 0x20>;
+
+ clock-names = "ref";
+ /* The board must provides the ref clock */
+
+ #clock-cells = <1>;
+ clock-output-names = "cpu", "ddr", "ahb";
+ };
+
+ wdt: wdt@18060008 {
+ compatible = "qca,ar7130-wdt";
+ reg = <0x18060008 0x8>;
+
+ interrupts = <4>;
+
+ clocks = <&pll ATH79_CLK_AHB>;
+ clock-names = "wdt";
+ };
+
+
+ rst: reset-controller@18060024 {
+ compatible = "qca,ar7100-reset";
+ reg = <0x18060024 0x4>;
+
+ #reset-cells = <1>;
+ };
+
+ pcie0: pcie-controller@180c0000 {
+ compatible = "qca,ar7100-pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0x0>;
+ reg = <0x17010000 0x100>;
+ reg-names = "cfg_base";
+ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x07000000 /* pci memory */
+ 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
+ interrupt-parent = <&cpuintc>;
+ interrupts = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 1>;
+ interrupt-map = <0 0 0 0 &pcie0 0>;
+ status = "disabled";
+ };
+ };
+ };
+
+ usb2: usb@1b000000 {
+ compatible = "generic-ehci";
+ reg = <0x1b000000 0x1000>;
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <3>;
+
+ phy-names = "usb-phy";
+ phys = <&usb_phy>;
+
+ has-synopsys-hc-bug;
+
+ status = "disabled";
+ };
+
+ usb1: usb@1c000000 {
+ compatible = "generic-ohci";
+ reg = <0x1c000000 0x1000>;
+
+ interrupt-parent = <&miscintc>;
+ interrupts = <6>;
+
+ phy-names = "usb-phy";
+ phys = <&usb_phy>;
+
+ status = "disabled";
+ };
+
+ spi: spi@1f000000 {
+ compatible = "qca,ar7100-spi";
+ reg = <0x1f000000 0x10>;
+
+ clocks = <&pll ATH79_CLK_AHB>;
+ clock-names = "ahb";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ };
+};
+
+&cpuintc {
+ qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
+ qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
+ <&ddr_ctrl 0>, <&ddr_ctrl 1>;
+};
+
+&miscintc {
+ compatible = "qca,ar7100-misc-intc";
+};
+
+&eth0 {
+ compatible = "qca,ar7100-eth";
+ reg = <0x19000000 0x200
+ 0x18070000 0x4>;
+
+ pll-data = <0x00110000 0x00001099 0x00991099>;
+ pll-reg = <0x4 0x10 17>;
+ pll-handle = <&pll>;
+ phy-mode = "rgmii";
+
+ resets = <&rst 8>, <&rst 9>;
+ reset-names = "phy", "mac";
+};
+
+&mdio1 {
+ builtin-switch;
+};
+
+&eth1 {
+ compatible = "qca,ar7100-eth";
+ reg = <0x1a000000 0x200
+ 0x18070004 0x4>;
+
+ pll-data = <0x00110000 0x00001099 0x00991099>;
+ pll-reg = <0x4 0x14 19>;
+ pll-handle = <&pll>;
+
+ phy-mode = "rgmii";
+
+ resets = <&rst 12>, <&rst 13>;
+ reset-names = "phy", "mac";
+};
diff --git a/target/linux/ath79/dts/ar7161_netgear_wndr3800.dts b/target/linux/ath79/dts/ar7161_netgear_wndr3800.dts
new file mode 100644
index 0000000000..60102b03ab
--- /dev/null
+++ b/target/linux/ath79/dts/ar7161_netgear_wndr3800.dts
@@ -0,0 +1,186 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "ar7100.dtsi"
+
+/ {
+ compatible = "netgear,wndr3800", "qca,ar7161";
+ model = "Netgear WNDR3800";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x8000000>;
+ };
+
+ extosc: ref {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-output-names = "ref";
+ clock-frequency = <40000000>;
+ };
+
+ reset-leds {
+ compatible = "reset-leds";
+
+ wps {
+ label = "netgear:green:usb";
+ resets = <&rst 12>;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+
+ wps {
+ label = "netgear:orange:wps";
+ gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ power_green {
+ label = "netgear:green:power";
+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ power_orange {
+ label = "netgear:orange:power";
+ gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ wps_green {
+ label = "netgear:green:wps";
+ gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ wan_green {
+ label = "netgear:green:wan";
+ gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+ };
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <100>;
+
+ button@0 {
+ label = "wps";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+ };
+
+ button@1 {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+ };
+
+ button@2 {
+ label = "wifi";
+ linux,code = <BTN_2>;
+ gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ rtl8366s {
+ compatible = "realtek,rtl8366s";
+ gpio-sda = <&gpio 5 GPIO_ACTIVE_HIGH>;
+ gpio-sck = <&gpio 7 GPIO_ACTIVE_HIGH>;
+
+ mdio-bus {
+ status = "okay";
+
+ phy-mask = <0x10>;
+
+ phy4: ethernet-phy@4 {
+ reg = <4>;
+ phy-mode = "rgmii";
+ };
+ };
+ };
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&usb1 {
+ status = "okay";
+};
+
+&usb2 {
+ status = "okay";
+};
+
+&pcie0 {
+ status = "okay";
+};
+
+&uart {
+ status = "okay";
+};
+
+&spi {
+ status = "okay";
+ num-cs = <1>;
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "mx25l12805d";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x000000 0x050000>;
+ read-only;
+ };
+
+ partition@1 {
+ label = "u-boot-env";
+ reg = <0x050000 0x020000>;
+ };
+
+ partition@2 {
+ label = "firmware";
+ reg = <0x70000 0xf80000>;
+ };
+
+ partition@3 {
+ label = "art";
+ reg = <0xff0000 0x010000>;
+ read-only;
+ };
+ };
+};
+
+&eth0 {
+ status = "okay";
+
+ pll-data = <0x11110000 0x00001099 0x00991099>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
+&eth1 {
+ status = "okay";
+
+ pll-data = <0x11110000 0x00001099 0x00991099>;
+
+ resets = <&rst 13>;
+ reset-names = "mac";
+
+ phy-handle = <&phy4>;
+};
diff --git a/target/linux/ath79/dts/ar7241.dtsi b/target/linux/ath79/dts/ar7241.dtsi
new file mode 100644
index 0000000000..f2efbe4358
--- /dev/null
+++ b/target/linux/ath79/dts/ar7241.dtsi
@@ -0,0 +1,78 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include "ar724x.dtsi"
+
+/ {
+ usb_phy: usb-phy {
+ compatible = "qca,ar7200-usb-phy";
+
+ reset-names = "usb-phy", "usb-suspend-override";
+ resets = <&rst 4>, <&rst 3>;
+
+ #phy-cells = <0>;
+
+ status = "disabled";
+ };
+};
+
+&gpio {
+ ngpios = <20>;
+};
+
+&ahb {
+ usb: usb@1b000000 {
+ compatible = "generic-ehci";
+ reg = <0x1b000000 0x1000>;
+
+ interrupts = <3>;
+
+ resets = <&rst 5>;
+ reset-names = "usb-host";
+
+ has-transaction-translator;
+ caps-offset = <0x100>;
+
+ phy-names = "usb-phy";
+ phys = <&usb_phy>;
+
+ status = "disabled";
+ };
+};
+
+&mdio0 {
+ regmap = <&eth1>;
+ builtin-switch;
+ resets = <&rst 22>;
+ reset-names = "mdio";
+};
+
+&eth0 {
+ compatible = "qca,ar7241-eth", "syscon";
+
+ pll-data = <0x00110000 0x00001099 0x00991099>;
+
+ resets = <&rst 8>, <&rst 9>;
+ reset-names = "mac", "phy";
+};
+
+&mdio1 {
+ resets = <&rst 23>;
+ reset-names = "mdio";
+ builtin-switch;
+};
+
+&eth1 {
+ compatible = "qca,ar7241-eth", "syscon";
+
+ pll-data = <0x00110000 0x00001099 0x00991099>;
+
+ resets = <&rst 12>, <&rst 13>;
+ reset-names = "mac", "phy";
+
+ phy-mode = "gmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
diff --git a/target/linux/ath79/dts/ar7241_ubnt-bullet-m.dts b/target/linux/ath79/dts/ar7241_ubnt-bullet-m.dts
new file mode 100644
index 0000000000..d14e2fdcb0
--- /dev/null
+++ b/target/linux/ath79/dts/ar7241_ubnt-bullet-m.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include "ar7241_ubnt-xm.dtsi"
+
+/ {
+ compatible = "ubnt,xm", "qca,ar7241";
+ model = "Ubiquiti Bullet M";
+};
+
+&eth1 {
+ compatible = "syscon";
+};
diff --git a/target/linux/ath79/dts/ar7241_ubnt-nano-m.dts b/target/linux/ath79/dts/ar7241_ubnt-nano-m.dts
new file mode 100644
index 0000000000..91fbac039e
--- /dev/null
+++ b/target/linux/ath79/dts/ar7241_ubnt-nano-m.dts
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include "ar7241_ubnt-xm.dtsi"
+
+/ {
+ compatible = "ubnt,nm", "qca,ar7241";
+ model = "Ubiquiti Nanostation M";
+};
diff --git a/target/linux/ath79/dts/ar7241_ubnt-rocket-m.dts b/target/linux/ath79/dts/ar7241_ubnt-rocket-m.dts
new file mode 100644
index 0000000000..ef2e407b87
--- /dev/null
+++ b/target/linux/ath79/dts/ar7241_ubnt-rocket-m.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include "ar7241_ubnt-xm.dtsi"
+
+/ {
+ compatible = "ubnt,rm", "qca,ar7241";
+ model = "Ubiquiti Rocket M";
+};
+
+&eth1 {
+ compatible = "syscon";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&usb {
+ status = "okay";
+};
diff --git a/target/linux/ath79/dts/ar7241_ubnt-unifi.dts b/target/linux/ath79/dts/ar7241_ubnt-unifi.dts
new file mode 100644
index 0000000000..c1829cb4f9
--- /dev/null
+++ b/target/linux/ath79/dts/ar7241_ubnt-unifi.dts
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "ar7241.dtsi"
+
+/ {
+ compatible = "ubnt,unifi", "qca,ar7241";
+ model = "Ubiquiti UniFi AP";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x4000000>;
+ };
+
+ extosc: ref {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <40000000>;
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ poll-interval = <20>;
+ button@0 {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led@0 {
+ label = "ubnt:green:dome";
+ gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+ };
+
+ led@1 {
+ label = "ubnt:orange:dome";
+ gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&uart {
+ status = "okay";
+};
+
+&pll {
+ clocks = <&extosc>;
+};
+
+&spi {
+ status = "okay";
+ num-cs = <1>;
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "mx25l6405d";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x000000 0x040000>;
+ };
+
+ partition@1 {
+ label = "u-boot-env";
+ reg = <0x040000 0x010000>;
+ };
+
+ partition@2 {
+ label = "firmware";
+ reg = <0x050000 0x750000>;
+ };
+
+ partition@3 {
+ label = "board_config";
+ reg = <0x7a0000 0x010000>;
+ read-only;
+ };
+
+ partition@4 {
+ label = "cfg";
+ reg = <0x7b0000 0x040000>;
+ read-only;
+ };
+
+ art: partition@5 {
+ label = "art";
+ reg = <0x7f0000 0x010000>;
+ read-only;
+ };
+ };
+};
+
+&pcie {
+ status = "okay";
+
+ ath9k@0000 {
+ reg = <0x0000 0 0 0 0>;
+ qca,no-eeprom;
+ };
+};
+
+&mdio0 {
+ status = "okay";
+
+ phy4: ethernet-phy@4 {
+ reg = <4>;
+ phy-mode = "mii";
+ };
+};
+
+&eth0 {
+ status = "okay";
+
+ mtd-mac-address = <&art 0x0>;
+ phy-handle = <&phy4>;
+};
+
+&eth1 {
+ status = "okay";
+
+ compatible = "syscon";
+};
diff --git a/target/linux/ath79/dts/ar7241_ubnt-xm.dts b/target/linux/ath79/dts/ar7241_ubnt-xm.dts
new file mode 100644
index 0000000000..3461c5b4c3
--- /dev/null
+++ b/target/linux/ath79/dts/ar7241_ubnt-xm.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include "ar7241_ubnt-xm.dtsi"
+
+/ {
+ compatible = "ubnt,xm", "qca,ar7241";
+ model = "Ubiquiti Networks XM (rev 1.0) board";
+};
+
+&eth1 {
+ compatible = "syscon";
+};
diff --git a/target/linux/ath79/dts/ar7241_ubnt-xm.dtsi b/target/linux/ath79/dts/ar7241_ubnt-xm.dtsi
new file mode 100644
index 0000000000..c9ad0413dc
--- /dev/null
+++ b/target/linux/ath79/dts/ar7241_ubnt-xm.dtsi
@@ -0,0 +1,146 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "ar7241.dtsi"
+
+/ {
+ compatible = "ubnt,xm", "qca,ar7241";
+ model = "Ubiquiti Networks XM (rev 1.0) board";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x2000000>;
+ };
+
+/* extosc: ref {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <40000000>;
+ };
+*/
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ poll-interval = <20>;
+ button@0 {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led@0 {
+ label = "ubnt:red:link1";
+ gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+ };
+
+ led@1 {
+ label = "ubnt:orange:link2";
+ gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ led@2 {
+ label = "ubnt:green:link3";
+ gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
+ };
+
+ led@3 {
+ label = "ubnt:green:link4";
+ gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&uart {
+ status = "okay";
+};
+
+/*&pll {
+ clocks = <&extosc>;
+};*/
+
+&spi {
+ status = "okay";
+ num-cs = <1>;
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "mx25l6405d";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x000000 0x040000>;
+ };
+
+ partition@1 {
+ label = "u-boot-env";
+ reg = <0x040000 0x010000>;
+ };
+
+ partition@2 {
+ label = "firmware";
+ reg = <0x050000 0x750000>;
+ };
+
+ partition@3 {
+ label = "board_config";
+ reg = <0x7a0000 0x010000>;
+ read-only;
+ };
+
+ partition@4 {
+ label = "cfg";
+ reg = <0x7b0000 0x040000>;
+ read-only;
+ };
+
+ art: partition@5 {
+ label = "art";
+ reg = <0x7f0000 0x010000>;
+ read-only;
+ };
+ };
+};
+
+&pcie {
+ status = "okay";
+
+ ath9k@0000 {
+ reg = <0x0000 0 0 0 0>;
+ qca,no-eeprom;
+ };
+};
+
+&mdio0 {
+ status = "okay";
+
+ phy4: ethernet-phy@4 {
+ reg = <4>;
+ phy-mode = "mii";
+ };
+};
+
+&eth0 {
+ status = "okay";
+
+ mtd-mac-address = <&art 0x0>;
+
+ phy-mode = "mii";
+ phy-handle = <&phy4>;
+};
+
+&eth1 {
+ status = "okay";
+
+ mtd-mac-address = <&art 0x6>;
+};
diff --git a/target/linux/ath79/dts/ar7242.dtsi b/target/linux/ath79/dts/ar7242.dtsi
new file mode 100644
index 0000000000..427d67a854
--- /dev/null
+++ b/target/linux/ath79/dts/ar7242.dtsi
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include "ar724x.dtsi"
+
+/ {
+ usb_phy: usb-phy {
+ compatible = "qca,ar7200-usb-phy";
+
+ reset-names = "usb-phy", "usb-suspend-override";
+ resets = <&rst 4>, <&rst 3>;
+
+ #phy-cells = <0>;
+
+ status = "disabled";
+ };
+};
+
+&gpio {
+ ngpios = <20>;
+};
+
+&ahb {
+ usb: usb@1b000000 {
+ compatible = "generic-ehci";
+ reg = <0x1b000000 0x1000>;
+
+ interrupts = <3>;
+
+ resets = <&rst 5>;
+ reset-names = "usb-host";
+
+ has-transaction-translator;
+ caps-offset = <0x100>;
+
+ phy-names = "usb-phy";
+ phys = <&usb_phy>;
+
+ status = "disabled";
+ };
+};
+
+&mdio0 {
+ resets = <&rst 22>;
+ reset-names = "mdio";
+};
+
+&eth0 {
+ compatible = "qca,ar7242-eth", "syscon";
+
+ pll-data = <0x16000000 0x00000101 0x00001616>;
+ pll-reg = <0x4 0x2c 17>;
+ pll-handle = <&pll>;
+
+ resets = <&rst 8>, <&rst 9>;
+ reset-names = "mac", "phy";
+};
+
+&mdio1 {
+ resets = <&rst 23>;
+ reset-names = "mdio";
+ builtin-switch;
+};
+
+&eth1 {
+ compatible = "qca,ar7242-eth", "syscon";
+
+ resets = <&rst 12>, <&rst 13>;
+ reset-names = "mac", "phy";
+};
diff --git a/target/linux/ath79/dts/ar7242_buffalo_wzr-hp-g450h.dts b/target/linux/ath79/dts/ar7242_buffalo_wzr-hp-g450h.dts
new file mode 100644
index 0000000000..826790f539
--- /dev/null
+++ b/target/linux/ath79/dts/ar7242_buffalo_wzr-hp-g450h.dts
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "ar7242.dtsi"
+
+/ {
+ compatible = "buffalo,wzr-hp-g450h", "qca,ar7242";
+ model = "Buffalo WZR-HP-G450H";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x4000000>;
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ poll-interval = <20>;
+ button@0 {
+ label = "usb";
+ linux,code = <BTN_2>;
+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+
+ button@1 {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+
+ button@2 {
+ label = "movie_engine";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
+ debounce-interval = <60>;
+ };
+
+ button@3 {
+ label = "aoss";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+
+ button@4 {
+ label = "router_off";
+ linux,code = <BTN_5>;
+ gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
+ debounce-interval = <60>;
+ };
+
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led@0 {
+ label = "buffalo:orange:security";
+ gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+ };
+
+ led@1 {
+ label = "buffalo:red:diag";
+ gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio-export {
+ compatible = "gpio-export";
+ #size-cells = <0>;
+
+ gpio_usb_power {
+ gpio-export,name = "wzr-hp-g450h:usb-power";
+ gpio-export,output = <1>;
+ gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&mdio0 {
+ status = "okay";
+ phy-mask = <0x1>;
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ phy-mode = "rgmii";
+ };
+};
+
+&eth0 {
+ status = "okay";
+
+ phy-mode = "rgmii";
+ pll-data = <0x62000000 0 0>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
+&uart {
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&usb {
+ status = "okay";
+};
+
+&pcie {
+ status = "okay";
+
+ ath9k@0000 {
+ reg = <0x0000 0 0 0 0>;
+ qca,no-eeprom;
+ };
+};
diff --git a/target/linux/ath79/dts/ar724x.dtsi b/target/linux/ath79/dts/ar724x.dtsi
new file mode 100644
index 0000000000..c1818a5905
--- /dev/null
+++ b/target/linux/ath79/dts/ar724x.dtsi
@@ -0,0 +1,140 @@
+// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/clock/ath79-clk.h>
+#include "ath79.dtsi"
+
+/ {
+ compatible = "qca,ar7240";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mips,mips24Kc";
+ clocks = <&pll ATH79_CLK_CPU>;
+ reg = <0>;
+ };
+ };
+
+ ahb: ahb {
+ apb {
+ ddr_ctrl: memory-controller@18000000 {
+ compatible = "qca,ar9132-ddr-controller",
+ "qca,ar7240-ddr-controller";
+ reg = <0x18000000 0x100>;
+
+ #qca,ddr-wb-channel-cells = <1>;
+ };
+
+ uart: uart@18020000 {
+ compatible = "ns16550a";
+ reg = <0x18020000 0x20>;
+ interrupts = <3>;
+
+ clocks = <&pll ATH79_CLK_AHB>;
+ clock-names = "uart";
+
+ reg-io-width = <4>;
+ reg-shift = <2>;
+ no-loopback-test;
+
+ status = "disabled";
+ };
+
+ gpio: gpio@18040000 {
+ compatible = "qca,ar7240-gpio",
+ "qca,ar7100-gpio";
+ reg = <0x18040000 0x30>;
+ interrupts = <2>;
+
+ ngpios = <18>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pll: pll-controller@18050000 {
+ compatible = "qca,ar7240-pll",
+ "qca,ar7240-pll";
+ reg = <0x18050000 0x20>;
+
+ clock-names = "ref";
+ /* The board must provides the ref clock */
+
+ #clock-cells = <1>;
+ clock-output-names = "cpu", "ddr", "ahb";
+ };
+
+ wdt: wdt@18060008 {
+ compatible = "qca,ar7130-wdt";
+ reg = <0x18060008 0x8>;
+
+ interrupts = <4>;
+
+ clocks = <&pll ATH79_CLK_AHB>;
+ clock-names = "wdt";
+ };
+
+ rst: reset-controller@1806001c {
+ compatible = "qca,ar7240-reset",
+ "qca,ar7100-reset";
+ reg = <0x1806001c 0x4>;
+
+ #reset-cells = <1>;
+ };
+
+ pcie: pcie-controller@180c0000 {
+ compatible = "qcom,ar7240-pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0x0>;
+ reg = <0x180c0000 0x1000>, /* CRP */
+ <0x180f0000 0x100>, /* CTRL */
+ <0x14000000 0x1000>; /* CFG */
+ reg-names = "crp_base", "ctrl_base", "cfg_base";
+ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 /* pci memory */
+ 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
+ interrupt-parent = <&cpuintc>;
+ interrupts = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 1>;
+ interrupt-map = <0 0 0 0 &pcie 0>;
+ status = "disabled";
+ };
+ };
+
+ spi: spi@1f000000 {
+ compatible = "qca,ar7240-spi",
+ "qca,ar7100-spi";
+ reg = <0x1f000000 0x10>;
+
+ clocks = <&pll ATH79_CLK_AHB>;
+ clock-names = "ahb";
+
+ status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
+
+&cpuintc {
+ qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
+ qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
+ <&ddr_ctrl 0>, <&ddr_ctrl 1>;
+};
diff --git a/target/linux/ath79/dts/ar9132.dtsi b/target/linux/ath79/dts/ar9132.dtsi
new file mode 100644
index 0000000000..7a7a5f1b3d
--- /dev/null
+++ b/target/linux/ath79/dts/ar9132.dtsi
@@ -0,0 +1,171 @@
+// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/clock/ath79-clk.h>
+
+/ {
+ compatible = "qca,ar9132";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mips,mips24Kc";
+ clocks = <&pll ATH79_CLK_CPU>;
+ reg = <0>;
+ };
+ };
+
+ cpuintc: interrupt-controller {
+ compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
+ qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
+ <&ddr_ctrl 0>, <&ddr_ctrl 1>;
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ ranges;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ interrupt-parent = <&cpuintc>;
+
+ apb {
+ compatible = "simple-bus";
+ ranges;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ interrupt-parent = <&miscintc>;
+
+ ddr_ctrl: memory-controller@18000000 {
+ compatible = "qca,ar9132-ddr-controller",
+ "qca,ar7240-ddr-controller";
+ reg = <0x18000000 0x100>;
+
+ #qca,ddr-wb-channel-cells = <1>;
+ };
+
+ uart: uart@18020000 {
+ compatible = "ns8250";
+ reg = <0x18020000 0x20>;
+ interrupts = <3>;
+
+ clocks = <&pll ATH79_CLK_AHB>;
+ clock-names = "uart";
+
+ reg-io-width = <4>;
+ reg-shift = <2>;
+ no-loopback-test;
+
+ status = "disabled";
+ };
+
+ gpio: gpio@18040000 {
+ compatible = "qca,ar9132-gpio",
+ "qca,ar7100-gpio";
+ reg = <0x18040000 0x30>;
+ interrupts = <2>;
+
+ ngpios = <22>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pll: pll-controller@18050000 {
+ compatible = "qca,ar9132-pll",
+ "qca,ar9130-pll";
+ reg = <0x18050000 0x20>;
+
+ clock-names = "ref";
+ /* The board must provides the ref clock */
+
+ #clock-cells = <1>;
+ clock-output-names = "cpu", "ddr", "ahb";
+ };
+
+ wdt: wdt@18060008 {
+ compatible = "qca,ar7130-wdt";
+ reg = <0x18060008 0x8>;
+
+ interrupts = <4>;
+
+ clocks = <&pll ATH79_CLK_AHB>;
+ clock-names = "wdt";
+ };
+
+ miscintc: interrupt-controller@18060010 {
+ compatible = "qca,ar9132-misc-intc",
+ "qca,ar7100-misc-intc";
+ reg = <0x18060010 0x8>;
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <6>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ rst: reset-controller@1806001c {
+ compatible = "qca,ar9132-reset",
+ "qca,ar7100-reset";
+ reg = <0x1806001c 0x4>;
+
+ #reset-cells = <1>;
+ };
+ };
+
+ usb: usb@1b000100 {
+ compatible = "qca,ar7100-ehci", "generic-ehci";
+ reg = <0x1b000100 0x100>;
+
+ interrupts = <3>;
+ resets = <&rst 5>;
+
+ has-transaction-translator;
+
+ phy-names = "usb";
+ phys = <&usb_phy>;
+
+ status = "disabled";
+ };
+
+ spi: spi@1f000000 {
+ compatible = "qca,ar9132-spi", "qca,ar7100-spi";
+ reg = <0x1f000000 0x10>;
+
+ clocks = <&pll ATH79_CLK_AHB>;
+ clock-names = "ahb";
+
+ status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ usb_phy: usb-phy {
+ compatible = "qca,ar7200-usb-phy";
+
+ reset-names = "usb-phy", "usb-suspend-override";
+ resets = <&rst 4>, <&rst 3>;
+
+ #phy-cells = <0>;
+
+ status = "disabled";
+ };
+};
diff --git a/target/linux/ath79/dts/ar9132_tl_wr1043nd_v1.dts b/target/linux/ath79/dts/ar9132_tl_wr1043nd_v1.dts
new file mode 100644
index 0000000000..099941258e
--- /dev/null
+++ b/target/linux/ath79/dts/ar9132_tl_wr1043nd_v1.dts
@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "ar9132.dtsi"
+
+/ {
+ compatible = "tplink,tl-wr1043nd-v1", "qca,ar9132";
+ model = "TP-Link TL-WR1043ND Version 1";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x2000000>;
+ };
+
+ extosc: ref {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <40000000>;
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ poll-interval = <20>;
+ button@0 {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+
+ button@1 {
+ label = "qss";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led@0 {
+ label = "tp-link:green:usb";
+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ };
+
+ led@1 {
+ label = "tp-link:green:system";
+ gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ led@2 {
+ label = "tp-link:green:qss";
+ gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
+ };
+
+ led@3 {
+ label = "tp-link:green:wlan";
+ gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&uart {
+ status = "okay";
+};
+
+&pll {
+ clocks = <&extosc>;
+};
+
+&usb {
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&spi {
+ status = "okay";
+ num-cs = <1>;
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "s25sl064a";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x000000 0x020000>;
+ };
+
+ partition@1 {
+ label = "firmware";
+ reg = <0x020000 0x7D0000>;
+ };
+
+ partition@2 {
+ label = "art";
+ reg = <0x7F0000 0x010000>;
+ read-only;
+ };
+ };
+};
diff --git a/target/linux/ath79/dts/ar9330.dtsi b/target/linux/ath79/dts/ar9330.dtsi
new file mode 100644
index 0000000000..1c03cd8880
--- /dev/null
+++ b/target/linux/ath79/dts/ar9330.dtsi
@@ -0,0 +1,160 @@
+// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/clock/ath79-clk.h>
+#include "ath79.dtsi"
+
+/ {
+ compatible = "qca,ar9330";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mips,mips24Kc";
+ clocks = <&pll ATH79_CLK_CPU>;
+ reg = <0>;
+ };
+ };
+
+ chosen {
+ bootargs = "console=ttyATH0,115200";
+ };
+
+ ahb {
+ apb {
+ ddr_ctrl: memory-controller@18000000 {
+ compatible = "qca,ar7240-ddr-controller";
+ reg = <0x18000000 0x100>;
+
+ #qca,ddr-wb-channel-cells = <1>;
+ };
+
+ uart: uart@18020000 {
+ compatible = "qca,ar9330-uart";
+ reg = <0x18020000 0x14>;
+
+ interrupts = <3>;
+
+ clocks = <&pll ATH79_CLK_REF>;
+ clock-names = "uart";
+
+ status = "disabled";
+ };
+
+ gpio: gpio@18040000 {
+ compatible = "qca,ar7100-gpio";
+ reg = <0x18040000 0x34>;
+ interrupts = <2>;
+
+ ngpios = <30>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ status = "disabled";
+ };
+
+ pll: pll-controller@18050000 {
+ compatible = "qca,ar9330-pll";
+ reg = <0x18050000 0x100>;
+
+ #clock-cells = <1>;
+ };
+
+ rst: reset-controller@1806001c {
+ compatible = "qca,ar7100-reset";
+ reg = <0x1806001c 0x4>;
+
+ #reset-cells = <1>;
+ };
+ };
+
+ usb: usb@1b000100 {
+ compatible = "chipidea,usb2";
+ reg = <0x1b000000 0x200>;
+
+ interrupts = <3>;
+ resets = <&rst 5>;
+ reset-names = "usb-host";
+
+ phy-names = "usb-phy";
+ phys = <&usb_phy>;
+
+ status = "disabled";
+ };
+
+ spi: spi@1f000000 {
+ compatible = "qca,ar7100-spi";
+ reg = <0x1f000000 0x10>;
+
+ clocks = <&pll ATH79_CLK_AHB>;
+ clock-names = "ahb";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ };
+
+ gmac: gmac@18070000 {
+ compatible = "qca,qr9330-gmac";
+ reg = <0x18070000 0x4>;
+ };
+ };
+
+ usb_phy: usb-phy {
+ compatible = "qca,ar7200-usb-phy";
+
+ reset-names = "usb-phy", "usb-suspend-override";
+ resets = <&rst 4>, <&rst 3>;
+
+ #phy-cells = <0>;
+
+ status = "disabled";
+ };
+};
+
+&cpuintc {
+ qca,ddr-wb-channel-interrupts = <2>, <3>;
+ qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
+};
+
+&eth0 {
+ compatible = "qca,ar9330-eth", "syscon";
+
+ pll-data = <0x00110000 0x00001099 0x00991099>;
+
+ resets = <&rst 9>;
+ reset-names = "mac";
+};
+
+&mdio0 {
+ regmap = <&eth1>;
+ builtin-switch;
+ resets = <&rst 23>;
+ reset-names = "mdio";
+};
+
+&mdio1 {
+ resets = <&rst 23>;
+ reset-names = "mdio";
+
+ builtin-switch;
+};
+
+&eth1 {
+ compatible = "qca,ar9330-eth", "syscon";
+
+ pll-data = <0x00110000 0x00001099 0x00991099>;
+ phy-mode = "gmii";
+
+ resets = <&rst 13>;
+ reset-names = "mac";
+};
diff --git a/target/linux/ath79/dts/ar9330_gl_ar150.dts b/target/linux/ath79/dts/ar9330_gl_ar150.dts
new file mode 100644
index 0000000000..a27956d9a4
--- /dev/null
+++ b/target/linux/ath79/dts/ar9330_gl_ar150.dts
@@ -0,0 +1,156 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "ar9330.dtsi"
+
+/ {
+ model = "GL.iNet GL-AR150";
+ compatible = "glinet,ar150";
+
+ aliases {
+ serial0 = &uart;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x4000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ wlan {
+ label = "gl-ar150:orange:wlan";
+ gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ lan {
+ label = "gl-ar150:green:lan";
+ gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ wan {
+ label = "gl-ar150:green:wan";
+ gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <100>;
+
+ manual {
+ label = "manual";
+ linux,code = <BTN_7>;
+ gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
+ };
+
+ auto {
+ label = "auto";
+ linux,code = <BTN_8>;
+ gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
+ };
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&uart {
+ status = "okay";
+};
+
+&gpio {
+ status = "okay";
+};
+
+&usb {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+ gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
+};
+
+&spi {
+ num-chipselects = <1>;
+ status = "okay";
+
+ spiflash {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <104000000>;
+ reg = <0>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x000000 0x040000>;
+ read-only;
+ };
+
+ partition@1 {
+ label = "u-boot-env";
+ reg = <0x040000 0x010000>;
+ };
+
+ partition@2 {
+ label = "firmware";
+ reg = <0x050000 0xfa0000>;
+ };
+
+ art: partition@3 {
+ label = "ART";
+ reg = <0xff0000 0x010000>;
+ read-only;
+ };
+ };
+};
+
+&mdio0 {
+ status = "okay";
+
+ phy4: ethernet-phy@4 {
+ reg = <4>;
+ phy-mode = "mii";
+ };
+};
+
+&eth0 {
+ status = "okay";
+
+ mtd-mac-address = <&art 0x0>;
+
+ phy-handle = <&phy4>;
+};
+
+&eth1 {
+ status = "okay";
+
+ mtd-mac-address = <&art 0x0>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+
+ gmac-config {
+ device = <&gmac>;
+
+ switch-phy-addr-swap = <0>;
+ switch-phy-swap = <0>;
+ };
+};
diff --git a/target/linux/ath79/dts/ar9331.dtsi b/target/linux/ath79/dts/ar9331.dtsi
new file mode 100644
index 0000000000..ed816c0618
--- /dev/null
+++ b/target/linux/ath79/dts/ar9331.dtsi
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0
+#include "ar9330.dtsi"
+
+/ {
+ compatible = "qca,ar9331";
+};
diff --git a/target/linux/ath79/dts/ar9331_dpt_module.dts b/target/linux/ath79/dts/ar9331_dpt_module.dts
new file mode 100644
index 0000000000..bcd863605b
--- /dev/null
+++ b/target/linux/ath79/dts/ar9331_dpt_module.dts
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "ar9331.dtsi"
+
+/ {
+ model = "DPTechnics DPT-Module";
+ compatible = "dptechnics,dpt-module";
+
+ aliases {
+ serial0 = &uart;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x4000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ system {
+ label = "dpt-module:green:system";
+ gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <100>;
+
+ button@0 {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&ref {
+ clock-frequency = <25000000>;
+};
+
+&uart {
+ status = "okay";
+};
+
+&gpio {
+ status = "okay";
+};
+
+&usb {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&spi {
+ num-chipselects = <1>;
+ status = "okay";
+
+ /* Winbond 25Q128FVSG SPI flash */
+ spiflash: w25q128@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "winbond,w25q128", "jedec,spi-nor";
+ spi-max-frequency = <104000000>;
+ reg = <0>;
+ };
+};
diff --git a/target/linux/ath79/dts/ar9331_dragino_ms14.dts b/target/linux/ath79/dts/ar9331_dragino_ms14.dts
new file mode 100644
index 0000000000..e7c446aa71
--- /dev/null
+++ b/target/linux/ath79/dts/ar9331_dragino_ms14.dts
@@ -0,0 +1,103 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "ar9331.dtsi"
+
+/ {
+ model = "Dragino MS14 (Dragino 2)";
+ compatible = "dragino,ms14";
+
+ aliases {
+ serial0 = &uart;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x4000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ wlan {
+ label = "dragino2:red:wlan";
+ gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ lan {
+ label = "dragino2:red:lan";
+ gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ wan {
+ label = "dragino2:red:wan";
+ gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ system {
+ label = "dragino2:red:system";
+ gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <100>;
+
+ button@0 {
+ label = "jumpstart";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+ };
+
+ button@1 {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&ref {
+ clock-frequency = <25000000>;
+};
+
+&uart {
+ status = "okay";
+};
+
+&gpio {
+ status = "okay";
+};
+
+&usb {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&spi {
+ num-chipselects = <1>;
+ status = "okay";
+
+ /* Winbond 25Q128BVFG SPI flash */
+ spiflash: w25q128@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "winbond,w25q128", "jedec,spi-nor";
+ spi-max-frequency = <104000000>;
+ reg = <0>;
+ };
+};
diff --git a/target/linux/ath79/dts/ar9331_ew_dorin.dts b/target/linux/ath79/dts/ar9331_ew_dorin.dts
new file mode 100644
index 0000000000..de4d9fe45d
--- /dev/null
+++ b/target/linux/ath79/dts/ar9331_ew_dorin.dts
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "ar9331.dtsi"
+
+/ {
+ model = "Embedded Wireless Dorin";
+ compatible = "embeddedwireless,dorin";
+
+ aliases {
+ serial0 = &uart;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x4000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "dorin:green:status";
+ gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <100>;
+
+ wps {
+ label = "wps";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+ };
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&uart {
+ status = "okay";
+};
+
+&gpio {
+ status = "okay";
+};
+
+&usb {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&spi {
+ num-chipselects = <1>;
+ status = "okay";
+
+ spiflash {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <104000000>;
+ reg = <0>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x000000 0x040000>;
+ read-only;
+ };
+
+ partition@1 {
+ label = "u-boot-env";
+ reg = <0x040000 0x010000>;
+ };
+
+ partition@2 {
+ label = "firmware";
+ reg = <0x050000 0xfa0000>;
+ };
+
+ art: partition@3 {
+ label = "ART";
+ reg = <0xff0000 0x010000>;
+ read-only;
+ };
+ };
+};
+
+&eth1 {
+ status = "okay";
+
+ mtd-mac-address = <&art 0x1002>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+
+ gmac-config {
+ device = <&gmac>;
+
+ switch-phy-addr-swap = <1>;
+ switch-phy-swap = <1>;
+ };
+};
+
+&mdio1 {
+ status = "okay";
+};
diff --git a/target/linux/ath79/dts/ar9331_omega.dts b/target/linux/ath79/dts/ar9331_omega.dts
new file mode 100644
index 0000000000..1225b245fd
--- /dev/null
+++ b/target/linux/ath79/dts/ar9331_omega.dts
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "ar9331.dtsi"
+
+/ {
+ model = "Onion Omega";
+ compatible = "onion,omega";
+
+ aliases {
+ serial0 = &uart;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x4000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ system {
+ label = "onion:amber:system";
+ gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <100>;
+
+ button@0 {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&ref {
+ clock-frequency = <25000000>;
+};
+
+&uart {
+ status = "okay";
+};
+
+&gpio {
+ status = "okay";
+};
+
+&usb {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&spi {
+ num-chipselects = <1>;
+ status = "okay";
+
+ /* Winbond 25Q128FVSG SPI flash */
+ spiflash: w25q128@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "winbond,w25q128", "jedec,spi-nor";
+ spi-max-frequency = <104000000>;
+ reg = <0>;
+ };
+};
diff --git a/target/linux/ath79/dts/ar9331_tl_mr3020.dts b/target/linux/ath79/dts/ar9331_tl_mr3020.dts
new file mode 100644
index 0000000000..7439768a2b
--- /dev/null
+++ b/target/linux/ath79/dts/ar9331_tl_mr3020.dts
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "ar9331.dtsi"
+
+/ {
+ model = "TP-Link TL-MR3020";
+ compatible = "tplink,tl-mr3020";
+
+ aliases {
+ serial0 = &uart;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x2000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ wlan {
+ label = "tp-link:green:wlan";
+ gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ lan {
+ label = "tp-link:green:lan";
+ gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ wps {
+ label = "tp-link:green:wps";
+ gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led3g {
+ label = "tp-link:green:3g";
+ gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <100>;
+
+ button@0 {
+ label = "wps";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
+ };
+
+ button@1 {
+ label = "sw1";
+ linux,code = <BTN_0>;
+ gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
+ };
+
+ button@2 {
+ label = "sw2";
+ linux,code = <BTN_1>;
+ gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_usb_vbus: reg_usb_vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio 8 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+};
+
+&ref {
+ clock-frequency = <25000000>;
+};
+
+&uart {
+ status = "okay";
+};
+
+&gpio {
+ status = "okay";
+};
+
+&usb {
+ dr_mode = "host";
+ vbus-supply = <&reg_usb_vbus>;
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&spi {
+ num-chipselects = <1>;
+ status = "okay";
+
+ /* Spansion S25FL032PIF SPI flash */
+ spiflash: s25sl032p@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spansion,s25sl032p", "jedec,spi-nor";
+ spi-max-frequency = <104000000>;
+ reg = <0>;
+ };
+};
diff --git a/target/linux/ath79/dts/ath79.dtsi b/target/linux/ath79/dts/ath79.dtsi
new file mode 100644
index 0000000000..c49f4652fe
--- /dev/null
+++ b/target/linux/ath79/dts/ath79.dtsi
@@ -0,0 +1,81 @@
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpuintc: interrupt-controller {
+ compatible = "qca,ar7100-cpu-intc";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ ranges;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ interrupt-parent = <&cpuintc>;
+
+ apb {
+ compatible = "simple-bus";
+ ranges;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ interrupt-parent = <&miscintc>;
+
+ miscintc: interrupt-controller@18060010 {
+ compatible = "qca,ar7240-misc-intc";
+ reg = <0x18060010 0x4>;
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <6>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+ };
+
+ eth0: eth@19000000 {
+ status = "disabled";
+
+ compatible = "qca,ath79-eth", "syscon";
+ reg = <0x19000000 0x200>;
+
+ interrupts = <4>;
+ phy-mode = "mii";
+
+ mdio0: mdio-bus {
+ status = "disabled";
+
+ regmap = <&eth0>;
+
+ clocks = <&pll ATH79_CLK_MDIO>;
+ clock-names = "ref";
+ };
+ };
+
+ eth1: eth@1a000000 {
+ status = "disabled";
+
+ compatible = "qca,ath79-eth", "syscon";
+ reg = <0x1a000000 0x200>;
+
+ interrupts = <5>;
+ phy-mode = "mii";
+
+ mdio1: mdio-bus {
+ status = "disabled";
+
+ regmap = <&eth1>;
+
+ clocks = <&pll ATH79_CLK_MDIO>;
+ clock-names = "ref";
+ };
+ };
+ };
+};
diff --git a/target/linux/ath79/dts/qca9557.dtsi b/target/linux/ath79/dts/qca9557.dtsi
new file mode 100644
index 0000000000..ed92da3bd7
--- /dev/null
+++ b/target/linux/ath79/dts/qca9557.dtsi
@@ -0,0 +1,201 @@
+// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/clock/ath79-clk.h>
+#include "ath79.dtsi"
+
+/ {
+ compatible = "qca,qca9557";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mips,mips24Kc";
+ clocks = <&pll ATH79_CLK_CPU>;
+ reg = <0>;
+ };
+ };
+
+ ahb {
+ apb {
+ ddr_ctrl: memory-controller@18000000 {
+ compatible = "qca,ar9557-ddr-controller",
+ "qca,ar7240-ddr-controller";
+ reg = <0x18000000 0x100>;
+
+ #qca,ddr-wb-channel-cells = <1>;
+ };
+
+ uart: uart@18020000 {
+ compatible = "ns16550a";
+ reg = <0x18020000 0x20>;
+
+ interrupts = <3>;
+
+ clocks = <&pll ATH79_CLK_REF>;
+ clock-names = "uart";
+
+ reg-io-width = <4>;
+ reg-shift = <2>;
+ no-loopback-test;
+
+ status = "disabled";
+ };
+
+ gpio: gpio@18040000 {
+ compatible = "qca,ar9557-gpio",
+ "qca,ar9340-gpio";
+ reg = <0x18040000 0x28>;
+
+ interrupts = <2>;
+ ngpios = <24>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pinmux: pinmux@1804002c {
+ compatible = "pinctrl-single";
+
+ reg = <0x1804002c 0x40>;
+
+ #size-cells = <0>;
+
+ pinctrl-single,bit-per-mux;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x1>;
+ #pinctrl-cells = <2>;
+
+ jtag_disable_pins: pinmux_jtag_disable_pins {
+ pinctrl-single,bits = <0x40 0x2 0x2>;
+ };
+ };
+
+ pll: pll-controller@18050000 {
+ compatible = "qca,ar9557-pll",
+ "qca,qca9550-pll";
+ reg = <0x18050000 0x20>;
+
+ #clock-cells = <1>;
+ clock-output-names = "cpu", "ddr", "ahb";
+ };
+
+ wdt: wdt@18060008 {
+ compatible = "qca,ar7130-wdt";
+ reg = <0x18060008 0x8>;
+
+ interrupts = <4>;
+
+ clocks = <&pll ATH79_CLK_AHB>;
+ clock-names = "wdt";
+ };
+
+ rst: reset-controller@1806001c {
+ compatible = "qca,ar9557-reset",
+ "qca,ar7100-reset",
+ "simple-bus";
+ reg = <0x1806001c 0x4>;
+
+ #reset-cells = <1>;
+ interrupt-parent = <&cpuintc>;
+
+ intc2: interrupt-controller@2 {
+ compatible = "qcom,qca9556-intc";
+
+ interrupts = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ qcom,pending-bits = <0x1f0>, /* pcie rc1 */
+ <0xf>; /* wmac */
+ };
+
+ intc3: interrupt-controller@3 {
+ compatible = "qcom,qca9556-intc";
+
+ interrupts = <3>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ qcom,pending-bits = <0x1f000>, /* pcie rc2 */
+ <0x1000000>, /* usb1 */
+ <0x10000000>; /* usb2 */
+ };
+ };
+
+ pcie0: pcie-controller@180c0000 {
+ compatible = "qcom,ar7240-pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0x0>;
+ reg = <0x180c0000 0x1000>, /* CRP */
+ <0x180f0000 0x100>, /* CTRL */
+ <0x14000000 0x1000>; /* CFG */
+ reg-names = "crp_base", "ctrl_base", "cfg_base";
+ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 /* pci memory */
+ 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
+ interrupt-parent = <&intc2>;
+ interrupts = <0>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 1>;
+ interrupt-map = <0 0 0 0 &pcie0 0>;
+ status = "disabled";
+ };
+ };
+
+ spi: spi@1f000000 {
+ compatible = "qca,ar9557-spi", "qca,ar7100-spi";
+ reg = <0x1f000000 0x10>;
+
+ clocks = <&pll ATH79_CLK_AHB>;
+ clock-names = "ahb";
+
+ status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
+
+&mdio0 {
+ resets = <&rst 22>;
+ reset-names = "mdio";
+};
+
+&eth0 {
+ compatible = "qca,qca9550-eth", "syscon";
+
+ pll-data = <0x82000101 0x80000101 0x80001313>;
+ phy-mode = "rgmii";
+
+ resets = <&rst 9>;
+ reset-names = "mac";
+};
+
+&mdio1 {
+ resets = <&rst 23>;
+ reset-names = "mdio";
+};
+
+&eth1 {
+ compatible = "qca,qca9550-eth", "syscon";
+
+ pll-data = <0x82000101 0x80000101 0x80001313>;
+ phy-mode = "sgmii";
+
+ resets = <&rst 13>;
+ reset-names = "mac";
+};
diff --git a/target/linux/ath79/dts/qca9558_om5p_ac.dts b/target/linux/ath79/dts/qca9558_om5p_ac.dts
new file mode 100644
index 0000000000..7165bc4e11
--- /dev/null
+++ b/target/linux/ath79/dts/qca9558_om5p_ac.dts
@@ -0,0 +1,170 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "qca9557.dtsi"
+
+/ {
+ compatible = "openmesh,om5p-ac-v2", "qca,qca9557";
+ model = "OpenMesh OM5P-AC V2";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x8000000>;
+ };
+
+ extosc: ref {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-output-names = "ref";
+ clock-frequency = <40000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power {
+ label = "om5pac:blue:power";
+ gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ wifi_green {
+ label = "om5pac:green:wifi";
+ gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ wifi_yellow {
+ label = "om5pac:yellow:wifi";
+ gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ wifi_red {
+ label = "om5pac:red:wifi";
+ gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <100>;
+
+ button@0 {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio-export {
+ compatible = "gpio-export";
+ #size-cells = <0>;
+
+ gpio_pa_dcdc {
+ gpio-export,name = "om5pac:pa_dcdc";
+ gpio-export,output = <1>;
+ gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
+ };
+ gpio_pa_high {
+ gpio-export,name = "om5pac:pa_high";
+ gpio-export,output = <1>;
+ gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&pinmux {
+ pinmux_pa_dcdc_pins {
+ pinctrl-single,bits = <0x0 0xff00 0x0>;
+ };
+
+ pinmux_pa_high_pins {
+ pinctrl-single,bits = <0x10 0xff 0x0>;
+ };
+};
+
+&pcie0 {
+ status = "okay";
+};
+
+&uart {
+ status = "okay";
+};
+
+&pll {
+ clocks = <&extosc>;
+};
+
+&spi {
+ status = "okay";
+ num-cs = <1>;
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "mx25l12805d";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x000000 0x040000>;
+ read-only;
+ };
+
+ partition@1 {
+ label = "u-boot-env";
+ reg = <0x040000 0x010000>;
+ };
+
+ partition@2 {
+ label = "firmware";
+ reg = <0x850000 0x7a0000>;
+ };
+
+ partition@3 {
+ label = "ART";
+ reg = <0xff0000 0x010000>;
+ read-only;
+ };
+ };
+};
+
+&mdio0 {
+ status = "okay";
+
+ phy4: ethernet-phy@4 {
+ reg = <4>;
+ phy-mode = "rgmii-id";
+ };
+};
+
+&mdio1 {
+ status = "okay";
+
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ phy-mode = "sgmii";
+ };
+};
+
+&eth0 {
+ status = "okay";
+
+ phy-handle = <&phy4>;
+ phy-mode = "rgmii";
+};
+
+&eth1 {
+ status = "okay";
+
+ phy-handle = <&phy1>;
+ phy-mode = "sgmii";
+};