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| author | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2021-02-24 01:52:34 +0100 |
|---|---|---|
| committer | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2021-02-25 14:42:11 +0100 |
| commit | 7054721cf94f4aa8fe71ac4c28c922b19a69ba1d (patch) | |
| tree | 4a1002adf6661cec5363d51221384393c9c63440 /target/linux/ath79/dts/ar9341_tplink.dtsi | |
| parent | f6b175a9bfa3a2d9ebc8672eaedf206b41d0f98b (diff) | |
| download | upstream-7054721cf94f4aa8fe71ac4c28c922b19a69ba1d.tar.gz upstream-7054721cf94f4aa8fe71ac4c28c922b19a69ba1d.tar.bz2 upstream-7054721cf94f4aa8fe71ac4c28c922b19a69ba1d.zip | |
ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.
Where the majority of devices is using it, also move the serial0
alias to the DTSI.
*) Since GL-USB150 even defines serial0 alias, the missing uart
is probably just a mistake. Anyway, disable it for now so this
patch stays cosmetic.
Apply this to 21.02 as well to remove an unnecessary backporting
pitfall.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit 3a4b751110b32380cf827f14a203190cfbc2e40f)
Diffstat (limited to 'target/linux/ath79/dts/ar9341_tplink.dtsi')
| -rw-r--r-- | target/linux/ath79/dts/ar9341_tplink.dtsi | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/target/linux/ath79/dts/ar9341_tplink.dtsi b/target/linux/ath79/dts/ar9341_tplink.dtsi index f229a1917e..26410bcc11 100644 --- a/target/linux/ath79/dts/ar9341_tplink.dtsi +++ b/target/linux/ath79/dts/ar9341_tplink.dtsi @@ -7,7 +7,6 @@ / { aliases { - serial0 = &uart; led-boot = &led_power; led-failsafe = &led_power; led-running = &led_power; @@ -66,10 +65,6 @@ clock-frequency = <25000000>; }; -&uart { - status = "okay"; -}; - &gpio { pinctrl-names = "default"; pinctrl-0 = <&jtag_disable_pins &pmx_usb_power>; |