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author | John Crispin <john@phrozen.org> | 2018-05-06 10:20:11 +0200 |
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committer | John Crispin <john@phrozen.org> | 2018-05-07 08:06:51 +0200 |
commit | 53c474abbdfef8eb3499e2d10c9ad491788b8a72 (patch) | |
tree | acd19415420664f59bc63c1ceb4ad37bb7323027 /target/linux/ath79/dts/ar9331_omega.dts | |
parent | 3dc523f232ff01d31d59345f5fa6de508d5059ef (diff) | |
download | upstream-53c474abbdfef8eb3499e2d10c9ad491788b8a72.tar.gz upstream-53c474abbdfef8eb3499e2d10c9ad491788b8a72.tar.bz2 upstream-53c474abbdfef8eb3499e2d10c9ad491788b8a72.zip |
ath79: add new OF only target for QCA MIPS silicon
This target aims to replace ar71xx mid-term. The big part that is still
missing is making the MMIO/AHB wifi work using OF. NAND and mikrotik
subtargets will follow.
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/ath79/dts/ar9331_omega.dts')
-rw-r--r-- | target/linux/ath79/dts/ar9331_omega.dts | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/ar9331_omega.dts b/target/linux/ath79/dts/ar9331_omega.dts new file mode 100644 index 0000000000..1225b245fd --- /dev/null +++ b/target/linux/ath79/dts/ar9331_omega.dts @@ -0,0 +1,79 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +#include "ar9331.dtsi" + +/ { + model = "Onion Omega"; + compatible = "onion,omega"; + + aliases { + serial0 = &uart; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x4000000>; + }; + + leds { + compatible = "gpio-leds"; + + system { + label = "onion:amber:system"; + gpios = <&gpio 27 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + }; + + keys { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + button@0 { + label = "reset"; + linux,code = <KEY_RESTART>; + gpios = <&gpio 11 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&ref { + clock-frequency = <25000000>; +}; + +&uart { + status = "okay"; +}; + +&gpio { + status = "okay"; +}; + +&usb { + dr_mode = "host"; + status = "okay"; +}; + +&usb_phy { + status = "okay"; +}; + +&spi { + num-chipselects = <1>; + status = "okay"; + + /* Winbond 25Q128FVSG SPI flash */ + spiflash: w25q128@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "winbond,w25q128", "jedec,spi-nor"; + spi-max-frequency = <104000000>; + reg = <0>; + }; +}; |