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| author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2022-02-04 15:57:50 +0200 |
|---|---|---|
| committer | Petr Štetiar <ynezz@true.cz> | 2022-02-24 19:05:28 +0100 |
| commit | e58cd453d58b20c6a6f34d3591640aa19aa14d25 (patch) | |
| tree | a4fef5f5d79575a7a60b516482ee114c1dbc932e /target/linux/at91/patches-5.10/202-ARM-at91-pm-use-r7-instead-of-tmp1.patch | |
| parent | 3ed992a99630457f660761ce199e3d2a00f06168 (diff) | |
| download | upstream-e58cd453d58b20c6a6f34d3591640aa19aa14d25.tar.gz upstream-e58cd453d58b20c6a6f34d3591640aa19aa14d25.tar.bz2 upstream-e58cd453d58b20c6a6f34d3591640aa19aa14d25.zip | |
at91: add kernel support for sama7g5 soc
Add kernel support for SAMA7G5 by back-porting mainline kernel patches.
Among SAMA7G5 features could be remembered:
- ARM Cortex-A7
- double data rate multi-port dynamic RAM controller supporting DDR2,
DDR3, DDR3L, LPDDR2, LPDDR3 up to 533MHz
- peripherals for audio, video processing
- 1 gigabit + 1 megabit Ethernet controllers
- 6 CAN controllers
- trust zone support
- DVFS for CPU
- criptography IPs
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Diffstat (limited to 'target/linux/at91/patches-5.10/202-ARM-at91-pm-use-r7-instead-of-tmp1.patch')
| -rw-r--r-- | target/linux/at91/patches-5.10/202-ARM-at91-pm-use-r7-instead-of-tmp1.patch | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/target/linux/at91/patches-5.10/202-ARM-at91-pm-use-r7-instead-of-tmp1.patch b/target/linux/at91/patches-5.10/202-ARM-at91-pm-use-r7-instead-of-tmp1.patch new file mode 100644 index 0000000000..f53d38556f --- /dev/null +++ b/target/linux/at91/patches-5.10/202-ARM-at91-pm-use-r7-instead-of-tmp1.patch @@ -0,0 +1,65 @@ +From 8a7a4cf3860910e460e2c3ca467b1dabf7ce9827 Mon Sep 17 00:00:00 2001 +From: Claudiu Beznea <claudiu.beznea@microchip.com> +Date: Thu, 15 Apr 2021 13:49:52 +0300 +Subject: [PATCH 202/247] ARM: at91: pm: use r7 instead of tmp1 + +Use r7 instead of tmp1 in macros. This prepares the filed for +next commits. + +Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> +Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> +Link: https://lore.kernel.org/r/20210415105010.569620-7-claudiu.beznea@microchip.com +--- + arch/arm/mach-at91/pm_suspend.S | 18 ++++++++++++------ + 1 file changed, 12 insertions(+), 6 deletions(-) + +diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S +index b683c2caa40b..3d20c9880fee 100644 +--- a/arch/arm/mach-at91/pm_suspend.S ++++ b/arch/arm/mach-at91/pm_suspend.S +@@ -31,30 +31,36 @@ tmp3 .req r6 + + /* + * Wait until master oscillator has stabilized. ++ * ++ * Side effects: overwrites r7 + */ + .macro wait_moscrdy +-1: ldr tmp1, [pmc, #AT91_PMC_SR] +- tst tmp1, #AT91_PMC_MOSCS ++1: ldr r7, [pmc, #AT91_PMC_SR] ++ tst r7, #AT91_PMC_MOSCS + beq 1b + .endm + + /* + * Wait for main oscillator selection is done ++ * ++ * Side effects: overwrites r7 + */ + .macro wait_moscsels +-1: ldr tmp1, [pmc, #AT91_PMC_SR] +- tst tmp1, #AT91_PMC_MOSCSELS ++1: ldr r7, [pmc, #AT91_PMC_SR] ++ tst r7, #AT91_PMC_MOSCSELS + beq 1b + .endm + + /* + * Put the processor to enter the idle state ++ * ++ * Side effects: overwrites r7 + */ + .macro at91_cpu_idle + + #if defined(CONFIG_CPU_V7) +- mov tmp1, #AT91_PMC_PCK +- str tmp1, [pmc, #AT91_PMC_SCDR] ++ mov r7, #AT91_PMC_PCK ++ str r7, [pmc, #AT91_PMC_SCDR] + + dsb + +-- +2.32.0 + |