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authorGabor Juhos <juhosg@openwrt.org>2012-03-13 17:29:37 +0000
committerGabor Juhos <juhosg@openwrt.org>2012-03-13 17:29:37 +0000
commitcd6a4cde130027b77f17ae5da758944f9de7f583 (patch)
tree507c900defd5a72f897d9431057e68697babf58d /target/linux/ar71xx
parent7c9534cfd7dfaeef7869cc1bcf47a182bb785ce6 (diff)
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ar71xx: ag71xx: start aneg on switch PHYs after reset
SVN-Revision: 30925
Diffstat (limited to 'target/linux/ar71xx')
-rw-r--r--target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c
index f14b23121a..9faed2197a 100644
--- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c
+++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c
@@ -596,6 +596,16 @@ static int ar7240sw_reset(struct ar7240sw *as)
ret = ar7240sw_reg_wait(mii, AR7240_REG_MASK_CTRL,
AR7240_MASK_CTRL_SOFT_RESET, 0, 1000);
+ /* setup PHYs */
+ for (i = 0; i < AR7240_NUM_PHYS; i++) {
+ ar7240sw_phy_write(mii, i, MII_ADVERTISE,
+ ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
+ ADVERTISE_PAUSE_ASYM);
+ ar7240sw_phy_write(mii, i, MII_BMCR,
+ BMCR_RESET | BMCR_ANENABLE);
+ }
+ msleep(1000);
+
ar7240sw_setup(as);
return ret;
}