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| author | Hauke Mehrtens <hauke@hauke-m.de> | 2017-10-03 18:02:59 +0200 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2017-10-11 22:32:39 +0200 |
| commit | 7bbf4117c6fe4b764d9d7c62fb2bcf6dd93bff2c (patch) | |
| tree | e42a4555f9845f78fb9baf7102da8d3d45adfacc /target/linux/ar71xx/patches-4.9/632-MIPS-ath79-gpio-enable-set-direction.patch | |
| parent | 2909a4b78e2bce5f6b9c35361866d5e9477a1bdc (diff) | |
| download | upstream-7bbf4117c6fe4b764d9d7c62fb2bcf6dd93bff2c.tar.gz upstream-7bbf4117c6fe4b764d9d7c62fb2bcf6dd93bff2c.tar.bz2 upstream-7bbf4117c6fe4b764d9d7c62fb2bcf6dd93bff2c.zip | |
ar71xx: Add kernel 4.9 support
This add support for kernel 4.9 to the ar71xx target.
It was compile tested with the generic, NAND and mikrotik subtarget.
Multiple members of the community tested it on their boards and did not
report any major problem so far.
Especially the NAND part received some changes to adapt to the new
kernel APIs. The serial driver hack used for the Arduino Yun was not
ported because the kernel changed there a lot.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/ar71xx/patches-4.9/632-MIPS-ath79-gpio-enable-set-direction.patch')
| -rw-r--r-- | target/linux/ar71xx/patches-4.9/632-MIPS-ath79-gpio-enable-set-direction.patch | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-4.9/632-MIPS-ath79-gpio-enable-set-direction.patch b/target/linux/ar71xx/patches-4.9/632-MIPS-ath79-gpio-enable-set-direction.patch new file mode 100644 index 0000000000..4cf36325e1 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/632-MIPS-ath79-gpio-enable-set-direction.patch @@ -0,0 +1,32 @@ +--- a/arch/mips/ath79/common.h ++++ b/arch/mips/ath79/common.h +@@ -28,6 +28,7 @@ void ath79_gpio_function_enable(u32 mask + void ath79_gpio_function_disable(u32 mask); + void ath79_gpio_function_setup(u32 set, u32 clear); + void ath79_gpio_output_select(unsigned gpio, u8 val); ++int ath79_gpio_direction_select(unsigned gpio, bool oe); + void ath79_gpio_init(void); + + #endif /* __ATH79_COMMON_H */ +--- a/arch/mips/ath79/gpio.c ++++ b/arch/mips/ath79/gpio.c +@@ -83,3 +83,19 @@ void __init ath79_gpio_output_select(uns + /* flush write */ + (void) __raw_readl(base + reg); + } ++ ++int ath79_gpio_direction_select(unsigned gpio, bool oe) ++{ ++ void __iomem *base = ath79_gpio_base; ++ bool ieq_1 = (soc_is_ar934x() || ++ soc_is_qca953x()); ++ ++ if ((ieq_1 && oe) || (!ieq_1 && !oe)) ++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << gpio), ++ base + AR71XX_GPIO_REG_OE); ++ else ++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << gpio), ++ base + AR71XX_GPIO_REG_OE); ++ ++ return 0; ++} |