diff options
author | John Crispin <john@phrozen.org> | 2018-08-09 15:59:41 +0200 |
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committer | John Crispin <john@phrozen.org> | 2018-08-22 08:09:00 +0200 |
commit | 318e19ba6755105bb6cc19937d8fff26cbd2cc6f (patch) | |
tree | 2f7c96140932a2770fb767141c7d1e93d29127b0 /target/linux/ar71xx/patches-4.14/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch | |
parent | e5f56c07d7fab9a6f2201f4100b593349b8ef67d (diff) | |
download | upstream-318e19ba6755105bb6cc19937d8fff26cbd2cc6f.tar.gz upstream-318e19ba6755105bb6cc19937d8fff26cbd2cc6f.tar.bz2 upstream-318e19ba6755105bb6cc19937d8fff26cbd2cc6f.zip |
ar71xx: add v4.14 support
adds v4.14 patches for testing but leaves v4.9 as default for now.
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/ar71xx/patches-4.14/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch')
-rw-r--r-- | target/linux/ar71xx/patches-4.14/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-4.14/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch b/target/linux/ar71xx/patches-4.14/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch new file mode 100644 index 0000000000..a65f7d993f --- /dev/null +++ b/target/linux/ar71xx/patches-4.14/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch @@ -0,0 +1,38 @@ +--- a/arch/mips/ath79/gpio.c ++++ b/arch/mips/ath79/gpio.c +@@ -33,6 +33,7 @@ static void __iomem *ath79_gpio_get_func + reg = AR71XX_GPIO_REG_FUNC; + else if (soc_is_ar934x() || + soc_is_qca953x() || ++ soc_is_qca955x() || + soc_is_qca956x() || + soc_is_tp9343()) + reg = AR934X_GPIO_REG_FUNC; +@@ -64,15 +65,21 @@ void ath79_gpio_function_disable(u32 mas + void __init ath79_gpio_output_select(unsigned gpio, u8 val) + { + void __iomem *base = ath79_gpio_base; +- unsigned int reg; ++ unsigned int reg, reg_base; + u32 t, s; + +- BUG_ON(!soc_is_ar934x() && !soc_is_qca953x() && !soc_is_qca956x()); +- +- if (gpio >= AR934X_GPIO_COUNT) +- return; ++ if (soc_is_ar934x()) ++ reg_base = AR934X_GPIO_REG_OUT_FUNC0; ++ else if (soc_is_qca953x()) ++ reg_base = QCA953X_GPIO_REG_OUT_FUNC0; ++ else if (soc_is_qca955x()) ++ reg_base = QCA955X_GPIO_REG_OUT_FUNC0; ++ else if (soc_is_qca956x()) ++ reg_base = QCA956X_GPIO_REG_OUT_FUNC0; ++ else ++ BUG(); + +- reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4); ++ reg = reg_base + 4 * (gpio / 4); + s = 8 * (gpio % 4); + + t = __raw_readl(base + reg); |