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| author | Gabor Juhos <juhosg@openwrt.org> | 2013-02-21 17:47:15 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2013-02-21 17:47:15 +0000 |
| commit | cf2324fd6b6752ce511b612fc192ab9f0b6a32cb (patch) | |
| tree | 4f94e8ab5c7b998cb84115489594f670957f3d4b /target/linux/ar71xx/patches-3.8/166-MIPS-ath79-register-UART-for-the-QCA955X-SoCs.patch | |
| parent | 9cc3a60b5a6988759532b63a6fb513484b8ec9f9 (diff) | |
| download | upstream-cf2324fd6b6752ce511b612fc192ab9f0b6a32cb.tar.gz upstream-cf2324fd6b6752ce511b612fc192ab9f0b6a32cb.tar.bz2 upstream-cf2324fd6b6752ce511b612fc192ab9f0b6a32cb.zip | |
ar71xx: add support for 3.8
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 35728
Diffstat (limited to 'target/linux/ar71xx/patches-3.8/166-MIPS-ath79-register-UART-for-the-QCA955X-SoCs.patch')
| -rw-r--r-- | target/linux/ar71xx/patches-3.8/166-MIPS-ath79-register-UART-for-the-QCA955X-SoCs.patch | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-3.8/166-MIPS-ath79-register-UART-for-the-QCA955X-SoCs.patch b/target/linux/ar71xx/patches-3.8/166-MIPS-ath79-register-UART-for-the-QCA955X-SoCs.patch new file mode 100644 index 0000000000..aacb8bbeb0 --- /dev/null +++ b/target/linux/ar71xx/patches-3.8/166-MIPS-ath79-register-UART-for-the-QCA955X-SoCs.patch @@ -0,0 +1,22 @@ +From f7d7b362b51c51c1ae80bb7ade2039d6f74d4070 Mon Sep 17 00:00:00 2001 +From: Gabor Juhos <juhosg@openwrt.org> +Date: Sun, 24 Jun 2012 13:46:26 +0200 +Subject: [PATCH 22/34] MIPS: ath79: register UART for the QCA955X SoCs + +Signed-off-by: Gabor Juhos <juhosg@openwrt.org> +--- + arch/mips/ath79/dev-common.c | 3 ++- + 1 files changed, 2 insertions(+), 1 deletions(-) + +--- a/arch/mips/ath79/dev-common.c ++++ b/arch/mips/ath79/dev-common.c +@@ -90,7 +90,8 @@ void __init ath79_register_uart(void) + if (soc_is_ar71xx() || + soc_is_ar724x() || + soc_is_ar913x() || +- soc_is_ar934x()) { ++ soc_is_ar934x() || ++ soc_is_qca955x()) { + ath79_uart_data[0].uartclk = clk_get_rate(clk); + platform_device_register(&ath79_uart_device); + } else if (soc_is_ar933x()) { |