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| author | Gabor Juhos <juhosg@openwrt.org> | 2012-05-05 13:56:35 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2012-05-05 13:56:35 +0000 |
| commit | 56f2e085371d5fc782385b8ab1b2c2f58560ac56 (patch) | |
| tree | 1114042e3ffee2c7b88dadff21b998dab692ca8e /target/linux/ar71xx/patches-3.3/127-MIPS-ath79-register-UART-device-for-AR934X-SoCs.patch | |
| parent | 8fffc6d6df5b99530fe164f82e2705ef9638517d (diff) | |
| download | upstream-56f2e085371d5fc782385b8ab1b2c2f58560ac56.tar.gz upstream-56f2e085371d5fc782385b8ab1b2c2f58560ac56.tar.bz2 upstream-56f2e085371d5fc782385b8ab1b2c2f58560ac56.zip | |
ar71xx: update 3.3 patches
SVN-Revision: 31602
Diffstat (limited to 'target/linux/ar71xx/patches-3.3/127-MIPS-ath79-register-UART-device-for-AR934X-SoCs.patch')
| -rw-r--r-- | target/linux/ar71xx/patches-3.3/127-MIPS-ath79-register-UART-device-for-AR934X-SoCs.patch | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-3.3/127-MIPS-ath79-register-UART-device-for-AR934X-SoCs.patch b/target/linux/ar71xx/patches-3.3/127-MIPS-ath79-register-UART-device-for-AR934X-SoCs.patch new file mode 100644 index 0000000000..2c7eecabf7 --- /dev/null +++ b/target/linux/ar71xx/patches-3.3/127-MIPS-ath79-register-UART-device-for-AR934X-SoCs.patch @@ -0,0 +1,27 @@ +From 2d4ed1c7405d05da812b67830eaac15f43b862b7 Mon Sep 17 00:00:00 2001 +From: Gabor Juhos <juhosg@openwrt.org> +Date: Wed, 14 Mar 2012 10:45:27 +0100 +Subject: [PATCH 32/47] MIPS: ath79: register UART device for AR934X SoCs + +Signed-off-by: Gabor Juhos <juhosg@openwrt.org> +Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> +Cc: linux-mips@linux-mips.org +Cc: mcgrof@infradead.org +Patchwork: https://patchwork.linux-mips.org/patch/3512/ +Signed-off-by: Ralf Baechle <ralf@linux-mips.org> +--- + arch/mips/ath79/dev-common.c | 3 ++- + 1 files changed, 2 insertions(+), 1 deletions(-) + +--- a/arch/mips/ath79/dev-common.c ++++ b/arch/mips/ath79/dev-common.c +@@ -89,7 +89,8 @@ void __init ath79_register_uart(void) + + if (soc_is_ar71xx() || + soc_is_ar724x() || +- soc_is_ar913x()) { ++ soc_is_ar913x() || ++ soc_is_ar934x()) { + ath79_uart_data[0].uartclk = clk_get_rate(clk); + platform_device_register(&ath79_uart_device); + } else if (soc_is_ar933x()) { |