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| author | Daniel F. Dickinson <cshored@thecshore.com> | 2018-12-17 00:25:03 -0500 |
|---|---|---|
| committer | Christian Lamparter <chunkeey@gmail.com> | 2018-12-20 18:28:59 +0100 |
| commit | 99c81eab785e8f50963c6c730a183a2f95ef4a54 (patch) | |
| tree | 16fca287e6b7764edc2d0d49a46eaa79d6c1a77d /target/linux/ar71xx/files | |
| parent | 9b8ea3623b22509b7c5090dc50e18e9af1f13405 (diff) | |
| download | upstream-99c81eab785e8f50963c6c730a183a2f95ef4a54.tar.gz upstream-99c81eab785e8f50963c6c730a183a2f95ef4a54.tar.bz2 upstream-99c81eab785e8f50963c6c730a183a2f95ef4a54.zip | |
ar71xx: Fix PowerCloud CR5000 5GHz wifi mac
Without this patch PowerCloud CR5000 AR9382 PCIe 5GHz Wifi uses
the mac address from eeprom instead the one specified when
initializing the PCIe chip. There were two issues:
1) ap94_pci_init on the second PCIe wmac is wrong as there is only one
PCIe wmac on this device (the other wmac is the AR1022/AR9342 SoC wmac).
2) Without specifying pdata->use_eeprom there is a failure to load
firmware and caldata.
Thanks to Christian Lamparter (@chunkeey) for the heavy lifting and
help. [0]
[0] <https://github.com/openwrt/openwrt/pull/1613>
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
Diffstat (limited to 'target/linux/ar71xx/files')
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/ath79/mach-cr5000.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-cr5000.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-cr5000.c index 0851899b40..7c41e7fbc0 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-cr5000.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-cr5000.c @@ -136,6 +136,7 @@ static struct mdio_board_info cr5000_mdio0_info[] = { static void __init cr5000_setup(void) { u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + struct ath9k_platform_data *pdata; ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE); gpio_request_one(CR5000_GPIO_LED_POWER_ENABLE, @@ -153,10 +154,12 @@ static void __init cr5000_setup(void) cr5000_gpio_keys); ath79_register_usb(); ath79_register_wmac(art + CR5000_WMAC_CALDATA_OFFSET, art + CR5000_WMAC_MAC_OFFSET); - ap94_pci_init(NULL, NULL, NULL, art + CR5000_PCIE_WMAC_OFFSET); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); + ap91_pci_init(NULL, art + CR5000_PCIE_WMAC_OFFSET); + pdata = ap9x_pci_get_wmac_data(0); + if (pdata) + pdata->use_eeprom = true; + ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); ath79_register_mdio(0, 0x0); ath79_init_mac(ath79_eth0_data.mac_addr, art + CR5000_MAC0_OFFSET, 0); |