ar71xx: Add support for TP-Link CPE210 v2

This PR adds support for a popular low-cost 2.4GHz N based AP

Specifications:
 - SoC: Qualcomm Atheros QCA9533 (650MHz)
 - RAM: 64MB
 - Storage: 8 MB SPI NOR
 - Wireless: 2.4GHz N based built into SoC 2x2
 - Ethernet: 1x 100/10 Mbps, integrated into SoC, 24V POE IN

Installation:
Flash factory image through stock firmware WEB UI
or through TFTP
To get to TFTP recovery just hold reset button while powering on for
around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP adress:192.168.0.254

Notes:
TP-Link does not use bootstrap registers so without this patch reference
clock detects as 40MHz while it is actually 25MHz.
This is due to messed up bootstrap resistor configuration on the PCB.
Provided GPL code just forces 25MHz reference clock.
That causes booting with completely wrong clocks, for example, CPU tries
to boot at 1040MHz while the stock is 650MHz.
So this PR depends on PR #672 to remove 40MHz reference clock.
Thanks to Sven Eckelmann <sven@narfation.org> for properly patching that.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>

3 files changed, 66 insertions, 2 deletions

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
index 4146f0186d..394e8d3c5e 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
+++ b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
@@ -1585,6 +1585,7 @@ config ATH79_MACH_CPE505N
 config ATH79_MACH_CPE510
 	bool "TP-LINK CPE510 support"
 	select SOC_AR934X
+	select SOC_QCA953X
 	select ATH79_DEV_ETH
 	select ATH79_DEV_GPIO_BUTTONS
 	select ATH79_DEV_LEDS_GPIO
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-cpe510.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-cpe510.c
index d2dbed1fe2..ceb1769ddd 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-cpe510.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-cpe510.c
@@ -1,7 +1,8 @@
 /*
- *  TP-LINK CPE210/220/510/520 board support
+ *  TP-LINK CPE210/210 v2/220/510/520 board support
  *
  *  Copyright (C) 2014 Matthias Schiffer <mschiffer@universe-factory.net>
+ *  Copyright (C) 2017 Robert Marko <robimarko@gmail.com>
  *
  *  This program is free software; you can redistribute it and/or modify it
  *  under the terms of the GNU General Public License version 2 as published
@@ -41,6 +42,8 @@
 #define CPE510_KEYS_POLL_INTERVAL	20 /* msecs */
 #define CPE510_KEYS_DEBOUNCE_INTERVAL	(3 * CPE510_KEYS_POLL_INTERVAL)
 
+/* CPE210 v2 reset GPIO */
+#define CPE210_V2_GPIO_BTN_RESET	17
 
 static struct gpio_led cpe510_leds_gpio[] __initdata = {
 	{
@@ -98,6 +101,30 @@ static struct gpio_led wbs510_leds_gpio[] __initdata = {
 	},
 };
 
+static struct gpio_led cpe210_v2_leds_gpio[] __initdata = {
+	{
+		.name		= "tp-link:green:lan0",
+		.gpio		= CPE510_GPIO_LED_LAN0,
+		.active_low	= 1,
+	}, {
+		.name		= "tp-link:green:link1",
+		.gpio		= CPE510_GPIO_LED_L1,
+		.active_low	= 1,
+	}, {
+		.name		= "tp-link:green:link2",
+		.gpio		= CPE510_GPIO_LED_L2,
+		.active_low	= 1,
+	}, {
+		.name		= "tp-link:green:link3",
+		.gpio		= CPE510_GPIO_LED_L3,
+		.active_low	= 1,
+	}, {
+		.name		= "tp-link:green:link4",
+		.gpio		= CPE510_GPIO_LED_L4,
+		.active_low	= 1,
+	},
+};
+
 static struct gpio_keys_button cpe510_gpio_keys[] __initdata = {
 	{
 		.desc		= "Reset button",
@@ -109,6 +136,17 @@ static struct gpio_keys_button cpe510_gpio_keys[] __initdata = {
 	}
 };
 
+static struct gpio_keys_button cpe210_v2_gpio_keys[] __initdata = {
+	{
+		.desc		= "Reset button",
+		.type		= EV_KEY,
+		.code		= KEY_RESTART,
+		.debounce_interval = CPE510_KEYS_DEBOUNCE_INTERVAL,
+		.gpio		= CPE210_V2_GPIO_BTN_RESET,
+		.active_low	= 1,
+	}
+};
+
 static void __init cpe_setup(u8 *mac)
 {
 	/* Disable JTAG, enabling GPIOs 0-3 */
@@ -171,9 +209,33 @@ static void __init wbs_setup(void)
 	ath79_register_wmac(ee, mac);
 }
 
+static void __init cpe210_v2_setup(void)
+{
+	u8 *mac = (u8 *) KSEG1ADDR(0x1f830008);
+	u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
+
+	ath79_register_leds_gpio(-1, ARRAY_SIZE(cpe210_v2_leds_gpio),
+				 cpe210_v2_leds_gpio);
+	ath79_register_gpio_keys_polled(-1, CPE510_KEYS_POLL_INTERVAL,
+					ARRAY_SIZE(cpe210_v2_gpio_keys),
+					cpe210_v2_gpio_keys);
+	ath79_register_m25p80(NULL);
+	ath79_register_mdio(0, 0x0);
+	ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
+	ath79_eth0_data.duplex = DUPLEX_FULL;
+	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
+	ath79_eth0_data.speed = SPEED_100;
+	ath79_eth0_data.phy_mask = BIT(4);
+	ath79_register_eth(0);
+	ath79_register_wmac(ee, mac);
+}
+
 MIPS_MACHINE(ATH79_MACH_CPE210, "CPE210", "TP-LINK CPE210/220",
 	     cpe210_setup);
 
+MIPS_MACHINE(ATH79_MACH_CPE210_V2, "CPE210V2", "TP-LINK CPE210 v2",
+	     cpe210_v2_setup);
+
 MIPS_MACHINE(ATH79_MACH_CPE510, "CPE510", "TP-LINK CPE510/520",
 	     cpe510_setup);
 
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
index dce25c6fc8..c5be6b9a38 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
+++ b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
@@ -73,7 +73,8 @@ enum ath79_mach_type {
 	ATH79_MACH_CF_E385AC,			/* COMFAST CF-E385AC */
 	ATH79_MACH_CF_E520N,			/* COMFAST CF-E520N */
 	ATH79_MACH_CF_E530N,			/* COMFAST CF-E530N */
-	ATH79_MACH_CPE210,			/* TP-LINK CPE210 */
+	ATH79_MACH_CPE210,			/* TP-LINK CPE210 v1 */
+	ATH79_MACH_CPE210_V2,			/* TP-LINK CPE210 v2 */
 	ATH79_MACH_CPE505N,			/* P&W CPE505N */
 	ATH79_MACH_CPE510,			/* TP-LINK CPE510 */
 	ATH79_MACH_CPE830,			/* YunCore CPE830 */