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author | John Crispin <john@openwrt.org> | 2015-07-07 13:46:54 +0000 |
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committer | John Crispin <john@openwrt.org> | 2015-07-07 13:46:54 +0000 |
commit | 055663201b7ce579815ec1cd23424237aede5134 (patch) | |
tree | 49c47adec24bfb6b00c03a2b573ef21d9f72b8bb /target/linux/ar71xx/files/arch | |
parent | 9f2b8b3902c38dfd68db74a4c235c7f38f177822 (diff) | |
download | upstream-055663201b7ce579815ec1cd23424237aede5134.tar.gz upstream-055663201b7ce579815ec1cd23424237aede5134.tar.bz2 upstream-055663201b7ce579815ec1cd23424237aede5134.zip |
ar71xx: Add Support for the Bitmain Antminer S3
This patch adds support for the Bitmain Antminer S3 Cryptocurrency Miner
http://wiki.openwrt.org/toh/bitmain/s3
Signed-off-by: L. D. Pinney <ldpinney@gmail.com>
SVN-Revision: 46236
Diffstat (limited to 'target/linux/ar71xx/files/arch')
-rw-r--r-- | target/linux/ar71xx/files/arch/mips/ath79/mach-antminer-s3.c | 98 |
1 files changed, 98 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-antminer-s3.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-antminer-s3.c new file mode 100644 index 0000000000..010c461acc --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-antminer-s3.c @@ -0,0 +1,98 @@ +/* + * Bitmain Antminer S3 board support + * + * Copyright (C) 2015 L. D. Pinney <ldpinney@gmail.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include <linux/gpio.h> + +#include <asm/mach-ath79/ath79.h> +#include <asm/mach-ath79/ar71xx_regs.h> + +#include "common.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-wmac.h" +#include "machtypes.h" +#include "dev-usb.h" + +#define ANTMINER_S3_GPIO_LED_WLAN 0 +#define ANTMINER_S3_GPIO_LED_SYSTEM 17 +#define ANTMINER_S3_GPIO_LED_LAN 22 + +#define ANTMINER_S3_GPIO_BTN_RESET 11 + +#define ANTMINER_S3_KEYSPOLL_INTERVAL 88 /* msecs */ +#define ANTMINER_S3_KEYSDEBOUNCE_INTERVAL (3 * ANTMINER_S3_KEYSPOLL_INTERVAL) + +static const char *ANTMINER_S3_part_probes[] = { + "tp-link", + NULL, +}; + +static struct flash_platform_data ANTMINER_S3_flash_data = { + .part_probes = ANTMINER_S3_part_probes, +}; + +static struct gpio_led ANTMINER_S3_leds_gpio[] __initdata = { + { + .name = "bitmain:green:wlan", + .gpio = ANTMINER_S3_GPIO_LED_WLAN, + .active_low = 0, + },{ + .name = "bitmain:green:system", + .gpio = ANTMINER_S3_GPIO_LED_SYSTEM, + .active_low = 0, + },{ + .name = "bitmain:yellow:lan", + .gpio = ANTMINER_S3_GPIO_LED_LAN, + .active_low = 0, + }, +}; + +static struct gpio_keys_button ANTMINER_S3_GPIO_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = ANTMINER_S3_KEYSDEBOUNCE_INTERVAL, + .gpio = ANTMINER_S3_GPIO_BTN_RESET, + .active_low = 0, + }, +}; + +static void __init antminer_s3_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); + u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); + + /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ + ath79_setup_ar933x_phy4_switch(false, false); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(ANTMINER_S3_leds_gpio), + ANTMINER_S3_leds_gpio); + + ath79_register_gpio_keys_polled(-1, ANTMINER_S3_KEYSPOLL_INTERVAL, + ARRAY_SIZE(ANTMINER_S3_GPIO_keys), + ANTMINER_S3_GPIO_keys); + ath79_register_usb(); + + ath79_register_m25p80(&ANTMINER_S3_flash_data); + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); + ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); + + ath79_register_mdio(0, 0x0); + ath79_register_eth(0); + ath79_register_eth(1); + + ath79_register_wmac(ee, mac); +} + +MIPS_MACHINE(ATH79_MACH_ANTMINER_S3, "ANTMINER-S3", + "Bitmain Antminer S3", antminer_s3_setup); |