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authorJohn Crispin <john@openwrt.org>2012-07-24 20:37:50 +0000
committerJohn Crispin <john@openwrt.org>2012-07-24 20:37:50 +0000
commit6641024f50b61178a07fc2ac846fb0ce8f53ee6f (patch)
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uart_clk on Rt3352F is always 40MHz
Currently, sys_clk/10 is used which is just wrong. cpu_clk/10 would work for systems with 400MHz CPU clock. Signed-off-by: Daniel Golle <dgolle@allnet.de> SVN-Revision: 32812
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