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author | Felix Fietkau <nbd@openwrt.org> | 2010-06-26 20:43:32 +0000 |
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committer | Felix Fietkau <nbd@openwrt.org> | 2010-06-26 20:43:32 +0000 |
commit | 08e4d51c29ea57920f6e5f7906b19b19e1c71a50 (patch) | |
tree | 587ae60c092c92cb965d1b5976f85a91aaf41f65 /package/broadcom-57xx/src/sbgige.h | |
parent | da1bb88a2b900f0392b731ec47c5e1bff956fd8f (diff) | |
download | upstream-08e4d51c29ea57920f6e5f7906b19b19e1c71a50.tar.gz upstream-08e4d51c29ea57920f6e5f7906b19b19e1c71a50.tar.bz2 upstream-08e4d51c29ea57920f6e5f7906b19b19e1c71a50.zip |
remove broadcom-57xx (only used on linux 2.4)
SVN-Revision: 21953
Diffstat (limited to 'package/broadcom-57xx/src/sbgige.h')
-rw-r--r-- | package/broadcom-57xx/src/sbgige.h | 58 |
1 files changed, 0 insertions, 58 deletions
diff --git a/package/broadcom-57xx/src/sbgige.h b/package/broadcom-57xx/src/sbgige.h deleted file mode 100644 index bc6e7693e4..0000000000 --- a/package/broadcom-57xx/src/sbgige.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * HND SiliconBackplane Gigabit Ethernet core registers - * - * Copyright 2007, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - */ - -#ifndef _sbgige_h_ -#define _sbgige_h_ - -#include <typedefs.h> -#include <sbconfig.h> -#include <pcicfg.h> - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif /* PAD */ - -/* PCI to OCP shim registers */ -typedef volatile struct { - uint32 FlushStatusControl; - uint32 FlushReadAddr; - uint32 FlushTimeoutCntr; - uint32 BarrierReg; - uint32 MaocpSIControl; - uint32 SiocpMaControl; - uint8 PAD[0x02E8]; -} sbgige_pcishim_t; - -/* SB core registers */ -typedef volatile struct { - /* PCI I/O Read/Write registers */ - uint8 pciio[0x0400]; - - /* Reserved */ - uint8 reserved[0x0400]; - - /* PCI configuration registers */ - pci_config_regs pcicfg; - uint8 PAD[0x0300]; - - /* PCI to OCP shim registers */ - sbgige_pcishim_t pcishim; - - /* Sonics SiliconBackplane registers */ - sbconfig_t sbconfig; -} sbgige_t; - -#endif /* _sbgige_h_ */ |