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authorAntony Antony <antony@phenome.org>2017-12-28 18:21:16 +0100
committerHauke Mehrtens <hauke@hauke-m.de>2018-02-17 01:15:24 +0100
commit6247929d66f1cdc6124b5f843416c3146975f0b8 (patch)
tree964f825d333ac9452e5a6ebee63c84ec7acfa8de
parentc971b4eeeaf628b1688ac4fc4bff9d4aab369f42 (diff)
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uboot-sunxi: add u-boot DT for NanoPi NEO Plus2 board
u-boot upstream commit 6130b1f6bc23 Signed-off-by: Antony Antony <antony@phenome.org>
-rw-r--r--package/boot/uboot-sunxi/patches/220-add-sunxi50i-nanopi-neo-plus2.patch165
1 files changed, 165 insertions, 0 deletions
diff --git a/package/boot/uboot-sunxi/patches/220-add-sunxi50i-nanopi-neo-plus2.patch b/package/boot/uboot-sunxi/patches/220-add-sunxi50i-nanopi-neo-plus2.patch
new file mode 100644
index 0000000000..309bf704f5
--- /dev/null
+++ b/package/boot/uboot-sunxi/patches/220-add-sunxi50i-nanopi-neo-plus2.patch
@@ -0,0 +1,165 @@
+From 77f54e8698001d8a987f2aa4870f71b65dc089eb Mon Sep 17 00:00:00 2001
+In-Reply-To: <20170921152217.4011-1-antony@phenome.org>
+References: <20170921152217.4011-1-antony@phenome.org>
+From: Antony Antony <antony@phenome.org>
+Date: Thu, 21 Sep 2017 13:34:07 +0200
+Subject: [PATCH v5 1/2] sun50i: h5: Add NanoPi Neo Plus2 DT initial support
+
+Add initial DT for NanoPi NEO Plus2 by FriendlyARM
+- Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
+- 1 GB DDR3 RAM
+- 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
+- micro SD card slot
+- Gigabit Ethernet (external RTL8211E-VB-CG chip)
+- 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
+- 2x USB 2.0 host ports
+
+Signed-off-by: Antony Antony <antony@phenome.org>
+---
+ arch/arm/dts/Makefile | 1 +
+ arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts | 106 ++++++++++++++++++++++++++++
+ configs/nanopi_neo_plus2_defconfig | 18 +++++
+ 3 files changed, 125 insertions(+)
+ create mode 100644 arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
+ create mode 100644 configs/nanopi_neo_plus2_defconfig
+
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -329,6 +329,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
+ sun8i-v3s-licheepi-zero.dtb
+ dtb-$(CONFIG_MACH_SUN50I_H5) += \
+ sun50i-h5-nanopi-neo2.dtb \
++ sun50i-h5-nanopi-neo-plus2.dtb \
+ sun50i-h5-orangepi-pc2.dtb \
+ sun50i-h5-orangepi-prime.dtb \
+ sun50i-h5-orangepi-zero-plus2.dtb
+--- /dev/null
++++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
+@@ -0,0 +1,106 @@
++/*
++ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
++ * Copyright (c) 2016 ARM Ltd.
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ * a) This library is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This library is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ * b) Permission is hereby granted, free of charge, to any person
++ * obtaining a copy of this software and associated documentation
++ * files (the "Software"), to deal in the Software without
++ * restriction, including without limitation the rights to use,
++ * copy, modify, merge, publish, distribute, sublicense, and/or
++ * sell copies of the Software, and to permit persons to whom the
++ * Software is furnished to do so, subject to the following
++ * conditions:
++ *
++ * The above copyright notice and this permission notice shall be
++ * included in all copies or substantial portions of the Software.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ * OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++
++#include "sun50i-h5.dtsi"
++
++#include <dt-bindings/gpio/gpio.h>
++
++/ {
++ model = "FriendlyARM NanoPi NEO Plus 2";
++ compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
++
++ aliases {
++ serial0 = &uart0;
++ };
++
++ chosen {
++ stdout-path = "serial0:115200n8";
++ };
++
++ reg_vcc3v3: vcc3v3 {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc3v3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ };
++};
++
++&ehci1 {
++ status = "okay";
++};
++
++&mmc0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
++ vmmc-supply = <&reg_vcc3v3>;
++ bus-width = <4>;
++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
++ cd-inverted;
++ status = "okay";
++};
++
++&mmc2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&mmc2_8bit_pins>;
++ vmmc-supply = <&reg_vcc3v3>;
++ bus-width = <8>;
++ non-removable;
++ cap-mmc-hw-reset;
++ status = "okay";
++};
++
++&ohci1 {
++ status = "okay";
++};
++
++&uart0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0_pins_a>;
++ status = "okay";
++};
++
++&usbphy {
++ status = "okay";
++};
+--- /dev/null
++++ b/configs/nanopi_neo_plus2_defconfig
+@@ -0,0 +1,18 @@
++CONFIG_ARM=y
++CONFIG_ARCH_SUNXI=y
++CONFIG_MACH_SUN50I_H5=y
++CONFIG_DRAM_CLK=408
++CONFIG_DRAM_ZQ=3881977
++CONFIG_MACPWR="PD6"
++CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo-plus2"
++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_SPL=y
++# CONFIG_CMD_IMLS is not set
++# CONFIG_CMD_FLASH is not set
++# CONFIG_CMD_FPGA is not set
++# CONFIG_SPL_DOS_PARTITION is not set
++# CONFIG_SPL_ISO_PARTITION is not set
++# CONFIG_SPL_EFI_PARTITION is not set
++CONFIG_SUN8I_EMAC=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_MMC_SUNXI_SLOT_EXTRA=2