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author | Gabor Juhos <juhosg@openwrt.org> | 2011-05-31 22:53:30 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2011-05-31 22:53:30 +0000 |
commit | 8f7541a0449f4072bac186efc48e0fd1849f75c8 (patch) | |
tree | 4e4dc15b1bfe1d91882adfbf7f7b574184d20d0c | |
parent | e11b9c8371ce855d10846e764267d9ae68694f27 (diff) | |
download | upstream-8f7541a0449f4072bac186efc48e0fd1849f75c8.tar.gz upstream-8f7541a0449f4072bac186efc48e0fd1849f75c8.tar.bz2 upstream-8f7541a0449f4072bac186efc48e0fd1849f75c8.zip |
ar71xx: enable GPIO support for the AR933x SoCs
SVN-Revision: 27057
-rw-r--r-- | target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c | 9 | ||||
-rw-r--r-- | target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h | 2 |
2 files changed, 9 insertions, 2 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c b/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c index 0ee6847003..10d80817f5 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c @@ -1,7 +1,7 @@ /* - * Atheros AR71xx SoC GPIO API support + * Atheros AR7XXX/AR9XXX SoC GPIO API support * - * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> + * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> * * This program is free software; you can redistribute it and/or modify it @@ -172,6 +172,11 @@ void __init ar71xx_gpio_init(void) ar71xx_gpio_chip.ngpio = AR91XX_GPIO_COUNT; break; + case AR71XX_SOC_AR9330: + case AR71XX_SOC_AR9331: + ar71xx_gpio_chip.ngpio = AR933X_GPIO_COUNT; + break; + case AR71XX_SOC_AR9341: case AR71XX_SOC_AR9342: case AR71XX_SOC_AR9344: diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h index 759c8e6ab3..6d43e25150 100644 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h +++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h @@ -455,6 +455,8 @@ static inline u32 ar71xx_usb_ctrl_rr(unsigned reg) #define AR91XX_GPIO_COUNT 22 +#define AR933X_GPIO_COUNT 30 + #define AR934X_GPIO_FUNC_SPI_CS_1_EN BIT(14) #define AR934X_GPIO_FUNC_SPI_CS_0_EN BIT(13) |