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| author | Felix Fietkau <nbd@openwrt.org> | 2011-07-03 01:08:18 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2011-07-03 01:08:18 +0000 |
| commit | b8dcd316eb9293df394725abcd2f8b7b781d5718 (patch) | |
| tree | 868db3b7c418ece46ea0189176e06504b3fa981d | |
| parent | 4083940628986f73a4f7fbea365aef7922f9acb1 (diff) | |
| download | upstream-b8dcd316eb9293df394725abcd2f8b7b781d5718.tar.gz upstream-b8dcd316eb9293df394725abcd2f8b7b781d5718.tar.bz2 upstream-b8dcd316eb9293df394725abcd2f8b7b781d5718.zip | |
ath5k: fix restoring the mac timing setting after a sleep clock setting change
SVN-Revision: 27365
| -rw-r--r-- | package/mac80211/patches/445-ath5k_fix_mac_clock_restore.patch | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/package/mac80211/patches/445-ath5k_fix_mac_clock_restore.patch b/package/mac80211/patches/445-ath5k_fix_mac_clock_restore.patch new file mode 100644 index 0000000000..e171cd116f --- /dev/null +++ b/package/mac80211/patches/445-ath5k_fix_mac_clock_restore.patch @@ -0,0 +1,27 @@ +--- a/drivers/net/wireless/ath/ath5k/reset.c ++++ b/drivers/net/wireless/ath/ath5k/reset.c +@@ -233,7 +233,7 @@ static void ath5k_hw_init_core_clock(str + static void ath5k_hw_set_sleep_clock(struct ath5k_hw *ah, bool enable) + { + struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; +- u32 scal, spending; ++ u32 scal, spending, sclock; + + /* Only set 32KHz settings if we have an external + * 32KHz crystal present */ +@@ -317,6 +317,15 @@ static void ath5k_hw_set_sleep_clock(str + + /* Set up tsf increment on each cycle */ + AR5K_REG_WRITE_BITS(ah, AR5K_TSF_PARM, AR5K_TSF_PARM_INC, 1); ++ ++ if ((ah->ah_radio == AR5K_RF5112) || ++ (ah->ah_radio == AR5K_RF5413) || ++ (ah->ah_radio == AR5K_RF2316) || ++ (ah->ah_radio == AR5K_RF2317)) ++ sclock = 40 - 1; ++ else ++ sclock = 32 - 1; ++ AR5K_REG_WRITE_BITS(ah, AR5K_USEC_5211, AR5K_USEC_32, sclock); + } + } + |