kernel: backport upstream commit to fix MIPS cache shift with secondary cache enabled

Signed-off-by: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 44024

4 files changed, 47 insertions, 5 deletions

diff --git a/target/linux/generic/patches-3.14/010-MIPS-Allow-MIPS_CPU_SCACHE-to-be-used-with-different.patch b/target/linux/generic/patches-3.14/010-MIPS-Allow-MIPS_CPU_SCACHE-to-be-used-with-different.patch
new file mode 100644
index 0000000000..f5cdc6d77d
--- /dev/null
+++ b/target/linux/generic/patches-3.14/010-MIPS-Allow-MIPS_CPU_SCACHE-to-be-used-with-different.patch
@@ -0,0 +1,42 @@
+From a7ef1eaddbf4bd50bfee92d9dfbecadc61467bbf Mon Sep 17 00:00:00 2001
+From: Kevin Cernekee <cernekee@gmail.com>
+Date: Mon, 20 Oct 2014 21:27:57 -0700
+Subject: [PATCH] MIPS: Allow MIPS_CPU_SCACHE to be used with different line
+ sizes
+
+CONFIG_MIPS_CPU_SCACHE determines whether to build sc-mips.c.  However,
+it is currently hardwired to use an L1_SHIFT of 6 (64 bytes).  Move the
+L1_SHIFT selection into the CPU or SoC section so that other SoCs can
+select different values.
+
+Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
+Cc: f.fainelli@gmail.com
+Cc: mbizon@freebox.fr
+Cc: jogo@openwrt.org
+Cc: jfraser@broadcom.com
+Cc: linux-mips@linux-mips.org
+Cc: devicetree@vger.kernel.org
+Patchwork: https://patchwork.linux-mips.org/patch/8162/
+Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
+---
+ arch/mips/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -315,6 +315,7 @@ config MIPS_MALTA
+ 	select I8259
+ 	select MIPS_BONITO64
+ 	select MIPS_CPU_SCACHE
++	select MIPS_L1_CACHE_SHIFT_6
+ 	select PCI_GT64XXX_PCI0
+ 	select MIPS_MSC
+ 	select SWAP_IO_SPACE
+@@ -1820,7 +1821,6 @@ config IP22_CPU_SCACHE
+ config MIPS_CPU_SCACHE
+ 	bool
+ 	select BOARD_SCACHE
+-	select MIPS_L1_CACHE_SHIFT_6
+ 
+ config R5000_CPU_SCACHE
+ 	bool
diff --git a/target/linux/generic/patches-3.14/132-mips_inline_dma_ops.patch b/target/linux/generic/patches-3.14/132-mips_inline_dma_ops.patch
index e43de025e6..e8486c9a47 100644
--- a/target/linux/generic/patches-3.14/132-mips_inline_dma_ops.patch
+++ b/target/linux/generic/patches-3.14/132-mips_inline_dma_ops.patch
@@ -19,7 +19,7 @@ Signed-off-by: Felix Fietkau <nbd@openwrt.org>
 
 --- a/arch/mips/Kconfig
 +++ b/arch/mips/Kconfig
-@@ -1620,6 +1620,9 @@ config SYS_HAS_CPU_XLR
+@@ -1621,6 +1621,9 @@ config SYS_HAS_CPU_XLR
  config SYS_HAS_CPU_XLP
  	bool
  
@@ -510,7 +510,7 @@ Signed-off-by: Felix Fietkau <nbd@openwrt.org>
  
  
  void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
-@@ -159,8 +137,8 @@ void dma_free_noncoherent(struct device
+@@ -159,8 +137,8 @@ void dma_free_noncoherent(struct device 
  }
  EXPORT_SYMBOL(dma_free_noncoherent);
  
@@ -650,7 +650,7 @@ Signed-off-by: Felix Fietkau <nbd@openwrt.org>
  
  void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  			 enum dma_data_direction direction)
-@@ -347,23 +225,10 @@ void dma_cache_sync(struct device *dev,
+@@ -347,23 +225,10 @@ void dma_cache_sync(struct device *dev, 
  
  EXPORT_SYMBOL(dma_cache_sync);
  
diff --git a/target/linux/generic/patches-3.14/301-mips_image_cmdline_hack.patch b/target/linux/generic/patches-3.14/301-mips_image_cmdline_hack.patch
index 3857438616..7f1b6bcc31 100644
--- a/target/linux/generic/patches-3.14/301-mips_image_cmdline_hack.patch
+++ b/target/linux/generic/patches-3.14/301-mips_image_cmdline_hack.patch
@@ -1,6 +1,6 @@
 --- a/arch/mips/Kconfig
 +++ b/arch/mips/Kconfig
-@@ -946,6 +946,10 @@ config SYNC_R4K
+@@ -947,6 +947,10 @@ config SYNC_R4K
  config MIPS_MACHINE
  	def_bool n
  
diff --git a/target/linux/generic/patches-3.14/304-mips_disable_fpu.patch b/target/linux/generic/patches-3.14/304-mips_disable_fpu.patch
index 4536ce6dae..adc934642a 100644
--- a/target/linux/generic/patches-3.14/304-mips_disable_fpu.patch
+++ b/target/linux/generic/patches-3.14/304-mips_disable_fpu.patch
@@ -8,7 +8,7 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org>
 --
 --- a/arch/mips/Kconfig
 +++ b/arch/mips/Kconfig
-@@ -934,6 +934,17 @@ config I8259
+@@ -935,6 +935,17 @@ config I8259
  config MIPS_BONITO64
  	bool