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| author | Oldřich Jedlička <oldium.pro@gmail.com> | 2017-04-23 09:29:15 +0200 |
|---|---|---|
| committer | Piotr Dymacz <pepe2k@gmail.com> | 2017-05-15 22:43:33 +0200 |
| commit | f4a97c7f5db7d2ea3c499677305fad2b6b872bd7 (patch) | |
| tree | ba6616b1fbe134b445ac75d1001dc502b4e07661 /.github | |
| parent | 6d7cb5337ec45f230dbba352896cf8a45641f9f3 (diff) | |
| download | upstream-f4a97c7f5db7d2ea3c499677305fad2b6b872bd7.tar.gz upstream-f4a97c7f5db7d2ea3c499677305fad2b6b872bd7.tar.bz2 upstream-f4a97c7f5db7d2ea3c499677305fad2b6b872bd7.zip | |
ar71xx: fix switch port mapping for ap123 based TP-Link devices
This fixes switch port mapping for: TL-WR841N/ND v8, TL-MR3420 v2 and
TL-WR941N/ND v5. All of them share the same Atheros ap123 reference
design.
The order of switch ports (shown in "swconfig dev eth1 show") is CPU,
LAN 4, LAN 1, LAN 2, LAN 3.
Signed-off-by: Oldřich Jedlička <oldium.pro@gmail.com>
[included 2 more devices]
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Diffstat (limited to '.github')
0 files changed, 0 insertions, 0 deletions