From d31e167c6812dde90df93beceb0b98de84497d1b Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Tue, 7 Jul 2015 08:06:05 +0000 Subject: ar71xx: add support for ap143 Signed-off-by: Miaoqing Pan git-svn-id: svn://svn.openwrt.org/openwrt/trunk@46208 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../810-MIPS-ath79-wmac-enable-set-led-pin.patch | 24 ++++++++++++ .../811-MIPS-ath79-gpio-enable-set-direction.patch | 43 ++++++++++++++++++++++ .../812-MIPS-ath79-add-ap143-support.patch | 43 ++++++++++++++++++++++ 3 files changed, 110 insertions(+) create mode 100644 target/linux/ar71xx/patches-3.18/810-MIPS-ath79-wmac-enable-set-led-pin.patch create mode 100644 target/linux/ar71xx/patches-3.18/811-MIPS-ath79-gpio-enable-set-direction.patch create mode 100644 target/linux/ar71xx/patches-3.18/812-MIPS-ath79-add-ap143-support.patch (limited to 'target/linux/ar71xx/patches-3.18') diff --git a/target/linux/ar71xx/patches-3.18/810-MIPS-ath79-wmac-enable-set-led-pin.patch b/target/linux/ar71xx/patches-3.18/810-MIPS-ath79-wmac-enable-set-led-pin.patch new file mode 100644 index 0000000000..880fbd7100 --- /dev/null +++ b/target/linux/ar71xx/patches-3.18/810-MIPS-ath79-wmac-enable-set-led-pin.patch @@ -0,0 +1,24 @@ +--- a/arch/mips/ath79/dev-wmac.c ++++ b/arch/mips/ath79/dev-wmac.c +@@ -398,6 +398,11 @@ void __init ath79_wmac_set_ext_lna_gpio(unsigned chain, int gpio) + ar934x_set_ext_lna_gpio(chain, gpio); + } + ++void __init ath79_wmac_set_led_pin(int gpio) ++{ ++ ath79_wmac_data.led_pin = gpio; ++} ++ + void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr) + { + if (soc_is_ar913x()) +--- a/arch/mips/ath79/dev-wmac.h ++++ b/arch/mips/ath79/dev-wmac.h +@@ -18,6 +18,7 @@ void ath79_wmac_disable_2ghz(void); + void ath79_wmac_disable_5ghz(void); + void ath79_wmac_set_tx_gain_buffalo(void); + void ath79_wmac_set_ext_lna_gpio(unsigned chain, int gpio); ++void ath79_wmac_set_led_pin(int gpio); + + bool ar93xx_wmac_read_mac_address(u8 *dest); + diff --git a/target/linux/ar71xx/patches-3.18/811-MIPS-ath79-gpio-enable-set-direction.patch b/target/linux/ar71xx/patches-3.18/811-MIPS-ath79-gpio-enable-set-direction.patch new file mode 100644 index 0000000000..f2c1f67b04 --- /dev/null +++ b/target/linux/ar71xx/patches-3.18/811-MIPS-ath79-gpio-enable-set-direction.patch @@ -0,0 +1,43 @@ +--- a/arch/mips/ath79/common.h ++++ b/arch/mips/ath79/common.h +@@ -28,6 +28,7 @@ void ath79_gpio_function_enable(u32 mask); + void ath79_gpio_function_disable(u32 mask); + void ath79_gpio_function_setup(u32 set, u32 clear); + void ath79_gpio_output_select(unsigned gpio, u8 val); ++int ath79_gpio_direction_select(unsigned gpio, bool oe); + void ath79_gpio_init(void); + + #endif /* __ATH79_COMMON_H */ +--- a/arch/mips/ath79/gpio.c ++++ b/arch/mips/ath79/gpio.c +@@ -130,6 +130,30 @@ static int ar934x_gpio_direction_output(struct gpio_chip *chip, unsigned offset, + return 0; + } + ++int ath79_gpio_direction_select(unsigned gpio, bool oe) ++{ ++ void __iomem *base = ath79_gpio_base; ++ unsigned long flags; ++ bool ieq_1 = (soc_is_ar934x() || ++ soc_is_qca953x()); ++ ++ if (gpio >= ath79_gpio_count) ++ return -1; ++ ++ spin_lock_irqsave(&ath79_gpio_lock, flags); ++ ++ if ((ieq_1 && oe) || (!ieq_1 && !oe)) ++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << gpio), ++ base + AR71XX_GPIO_REG_OE); ++ else ++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << gpio), ++ base + AR71XX_GPIO_REG_OE); ++ ++ spin_unlock_irqrestore(&ath79_gpio_lock, flags); ++ ++ return 0; ++} ++ + static struct gpio_chip ath79_gpio_chip = { + .label = "ath79", + .get = ath79_gpio_get_value, diff --git a/target/linux/ar71xx/patches-3.18/812-MIPS-ath79-add-ap143-support.patch b/target/linux/ar71xx/patches-3.18/812-MIPS-ath79-add-ap143-support.patch new file mode 100644 index 0000000000..7034d72192 --- /dev/null +++ b/target/linux/ar71xx/patches-3.18/812-MIPS-ath79-add-ap143-support.patch @@ -0,0 +1,43 @@ +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -114,6 +114,20 @@ config ATH79_MACH_AP136 + Say 'Y' here if you want your kernel to support the + Atheros AP136 or AP135 reference boards. + ++config ATH79_MACH_AP143 ++ bool "Atheros AP143 reference board" ++ select SOC_QCA953X ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_SPI ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ select ATH79_DEV_ETH ++ select ATH79_DEV_M25P80 ++ help ++ Say 'Y' here if you want your kernel to support the ++ Atheros AP143 reference board. ++ + config ATH79_MACH_AP81 + bool "Atheros AP81 reference board" + select SOC_AR913X +--- a/arch/mips/ath79/Makefile ++++ b/arch/mips/ath79/Makefile +@@ -47,6 +47,7 @@ obj-$(CONFIG_ATH79_MACH_AP113) += mach-ap113.o + obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o + obj-$(CONFIG_ATH79_MACH_AP132) += mach-ap132.o + obj-$(CONFIG_ATH79_MACH_AP136) += mach-ap136.o ++obj-$(CONFIG_ATH79_MACH_AP143) += mach-ap143.o + obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o + obj-$(CONFIG_ATH79_MACH_AP83) += mach-ap83.o + obj-$(CONFIG_ATH79_MACH_AP96) += mach-ap96.o +--- a/arch/mips/ath79/machtypes.h ++++ b/arch/mips/ath79/machtypes.h +@@ -29,6 +29,7 @@ enum ath79_mach_type { + ATH79_MACH_AP135_020, /* Atheros AP135-020 reference board */ + ATH79_MACH_AP136_010, /* Atheros AP136-010 reference board */ + ATH79_MACH_AP136_020, /* Atheros AP136-020 reference board */ ++ ATH79_MACH_AP143, /* Atheros AP143 reference board */ + ATH79_MACH_AP81, /* Atheros AP81 reference board */ + ATH79_MACH_AP83, /* Atheros AP83 */ + ATH79_MACH_AP96, /* Atheros AP96 */ -- cgit v1.2.3